2021-07-07 10:53:19 +00:00
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/*
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* S/390 CPU dump to FILE
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*
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* Copyright (c) 2009 Ulrich Hecht
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* Copyright (c) 2011 Alexander Graf
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "s390x-internal.h"
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#include "qemu/qemu-print.h"
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#include "sysemu/tcg.h"
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void s390_cpu_dump_state(CPUState *cs, FILE *f, int flags)
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{
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S390CPU *cpu = S390_CPU(cs);
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CPUS390XState *env = &cpu->env;
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int i;
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qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64,
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s390_cpu_get_psw_mask(env), env->psw.addr);
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if (!tcg_enabled()) {
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qemu_fprintf(f, "\n");
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} else if (env->cc_op > 3) {
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qemu_fprintf(f, " cc %15s\n", cc_name(env->cc_op));
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} else {
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qemu_fprintf(f, " cc %02x\n", env->cc_op);
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}
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for (i = 0; i < 16; i++) {
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qemu_fprintf(f, "R%02d=%016" PRIx64, i, env->regs[i]);
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if ((i % 4) == 3) {
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qemu_fprintf(f, "\n");
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} else {
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qemu_fprintf(f, " ");
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}
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}
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if (flags & CPU_DUMP_FPU) {
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if (s390_has_feat(S390_FEAT_VECTOR)) {
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for (i = 0; i < 32; i++) {
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qemu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64 "%c",
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i, env->vregs[i][0], env->vregs[i][1],
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i % 2 ? '\n' : ' ');
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}
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} else {
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for (i = 0; i < 16; i++) {
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qemu_fprintf(f, "F%02d=%016" PRIx64 "%c",
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i, *get_freg(env, i),
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(i % 4) == 3 ? '\n' : ' ');
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}
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}
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}
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#ifndef CONFIG_USER_ONLY
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for (i = 0; i < 16; i++) {
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qemu_fprintf(f, "C%02d=%016" PRIx64, i, env->cregs[i]);
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if ((i % 4) == 3) {
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qemu_fprintf(f, "\n");
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} else {
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qemu_fprintf(f, " ");
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}
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}
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#endif
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#ifdef DEBUG_INLINE_BRANCHES
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for (i = 0; i < CC_OP_MAX; i++) {
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qemu_fprintf(f, " %15s = %10ld\t%10ld\n", cc_name(i),
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inline_branch_miss[i], inline_branch_hit[i]);
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}
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#endif
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qemu_fprintf(f, "\n");
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}
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const char *cc_name(enum cc_op cc_op)
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{
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static const char * const cc_names[] = {
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[CC_OP_CONST0] = "CC_OP_CONST0",
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[CC_OP_CONST1] = "CC_OP_CONST1",
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[CC_OP_CONST2] = "CC_OP_CONST2",
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[CC_OP_CONST3] = "CC_OP_CONST3",
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[CC_OP_DYNAMIC] = "CC_OP_DYNAMIC",
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[CC_OP_STATIC] = "CC_OP_STATIC",
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[CC_OP_NZ] = "CC_OP_NZ",
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[CC_OP_ADDU] = "CC_OP_ADDU",
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[CC_OP_SUBU] = "CC_OP_SUBU",
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[CC_OP_LTGT_32] = "CC_OP_LTGT_32",
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[CC_OP_LTGT_64] = "CC_OP_LTGT_64",
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[CC_OP_LTUGTU_32] = "CC_OP_LTUGTU_32",
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[CC_OP_LTUGTU_64] = "CC_OP_LTUGTU_64",
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[CC_OP_LTGT0_32] = "CC_OP_LTGT0_32",
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[CC_OP_LTGT0_64] = "CC_OP_LTGT0_64",
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[CC_OP_ADD_64] = "CC_OP_ADD_64",
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[CC_OP_SUB_64] = "CC_OP_SUB_64",
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[CC_OP_ABS_64] = "CC_OP_ABS_64",
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[CC_OP_NABS_64] = "CC_OP_NABS_64",
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[CC_OP_ADD_32] = "CC_OP_ADD_32",
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[CC_OP_SUB_32] = "CC_OP_SUB_32",
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[CC_OP_ABS_32] = "CC_OP_ABS_32",
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[CC_OP_NABS_32] = "CC_OP_NABS_32",
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[CC_OP_COMP_32] = "CC_OP_COMP_32",
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[CC_OP_COMP_64] = "CC_OP_COMP_64",
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[CC_OP_TM_32] = "CC_OP_TM_32",
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[CC_OP_TM_64] = "CC_OP_TM_64",
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[CC_OP_NZ_F32] = "CC_OP_NZ_F32",
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[CC_OP_NZ_F64] = "CC_OP_NZ_F64",
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[CC_OP_NZ_F128] = "CC_OP_NZ_F128",
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[CC_OP_ICM] = "CC_OP_ICM",
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2022-01-12 16:50:15 +00:00
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[CC_OP_SLA] = "CC_OP_SLA",
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2021-07-07 10:53:19 +00:00
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[CC_OP_FLOGR] = "CC_OP_FLOGR",
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[CC_OP_LCBB] = "CC_OP_LCBB",
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[CC_OP_VC] = "CC_OP_VC",
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[CC_OP_MULS_32] = "CC_OP_MULS_32",
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[CC_OP_MULS_64] = "CC_OP_MULS_64",
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};
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return cc_names[cc_op];
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}
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