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49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
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#ifndef SHPC_H
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#define SHPC_H
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#include "qemu-common.h"
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#include "memory.h"
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#include "vmstate.h"
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struct SHPCDevice {
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/* Capability offset in device's config space */
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int cap;
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/* # of hot-pluggable slots */
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int nslots;
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/* SHPC WRS: working register set */
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uint8_t *config;
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/* Used to enable checks on load. Note that writable bits are
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* never checked even if set in cmask. */
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uint8_t *cmask;
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/* Used to implement R/W bytes */
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uint8_t *wmask;
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/* Used to implement RW1C(Write 1 to Clear) bytes */
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uint8_t *w1cmask;
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/* MMIO for the SHPC BAR */
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MemoryRegion mmio;
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/* Bus controlled by this SHPC */
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PCIBus *sec_bus;
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/* MSI already requested for this event */
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int msi_requested;
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};
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void shpc_reset(PCIDevice *d);
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int shpc_bar_size(PCIDevice *dev);
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int shpc_init(PCIDevice *dev, PCIBus *sec_bus, MemoryRegion *bar, unsigned off);
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void shpc_cleanup(PCIDevice *dev, MemoryRegion *bar);
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void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len);
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extern VMStateInfo shpc_vmstate_info;
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#define SHPC_VMSTATE(_field, _type) \
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VMSTATE_BUFFER_UNSAFE_INFO(_field, _type, 0, shpc_vmstate_info, 0)
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#endif
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