2012-11-14 20:54:06 +00:00
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/*
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* Q35 chipset based pc system emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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* Copyright (c) 2009, 2010
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* Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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* Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
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*
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* This is based on pc.c, but heavily modified.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2013-02-04 14:40:22 +00:00
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#include "hw/hw.h"
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2013-08-19 14:26:55 +00:00
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#include "hw/loader.h"
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2012-12-17 17:20:04 +00:00
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#include "sysemu/arch_init.h"
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2013-02-05 16:06:20 +00:00
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#include "hw/i2c/smbus.h"
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2013-02-04 14:40:22 +00:00
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#include "hw/boards.h"
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2013-02-05 16:06:20 +00:00
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|
#include "hw/timer/mc146818rtc.h"
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|
|
#include "hw/xen/xen.h"
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2012-12-17 17:20:04 +00:00
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|
#include "sysemu/kvm.h"
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2013-02-04 14:40:22 +00:00
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|
#include "hw/kvm/clock.h"
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2013-02-05 16:06:20 +00:00
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|
#include "hw/pci-host/q35.h"
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2012-12-17 17:19:49 +00:00
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|
#include "exec/address-spaces.h"
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2013-02-05 16:06:20 +00:00
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|
#include "hw/i386/ich9.h"
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2013-10-30 12:56:40 +00:00
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#include "hw/i386/smbios.h"
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2012-11-14 20:54:06 +00:00
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#include "hw/ide/pci.h"
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#include "hw/ide/ahci.h"
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#include "hw/usb.h"
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2013-04-29 15:02:50 +00:00
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#include "hw/cpu/icc_bus.h"
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2014-06-20 01:40:25 +00:00
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#include "qemu/error-report.h"
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2012-11-14 20:54:06 +00:00
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/* ICH9 AHCI has 6 ports */
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#define MAX_SATA_PORTS 6
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2013-11-06 12:48:40 +00:00
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static bool has_pci_info;
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i386: ACPI table generation code from seabios
This adds C code for generating ACPI tables at runtime,
imported from seabios git tree
commit 51684b7ced75fb76776e8ee84833fcfb6ecf12dd
Although ACPI tables come from a system BIOS on real hw,
it makes sense that the ACPI tables are coupled with the
virtual machine, since they have to abstract the x86 machine to
the OS's.
This is widely desired as a way to avoid the churn
and proliferation of QEMU-specific interfaces
associated with ACPI tables in bios code.
Notes:
As BIOS can reprogram devices prior to loading
ACPI tables, we pre-format ACPI tables but defer loading
hardware configuration there until tables are loaded.
The code structure was intentionally kept as close
to the seabios original as possible, to simplify
comparison and making sure we didn't lose anything
in translation.
Minor code duplication results, to help ensure there are no functional
regressions, I think it's better to merge it like this and do more code
changes in follow-up patches.
Cross-version compatibility concerns have been addressed:
ACPI tables are exposed to guest as FW_CFG entries.
When running with -M 1.5 and older, this patch disables ACPI
table generation, and doesn't expose ACPI
tables to guest.
As table content is likely to change over time,
the following measures are taken to simplify
cross-version migration:
- All tables besides the RSDP are packed in a single FW CFG entry.
This entry size is currently 23K. We round it up to 64K
to avoid too much churn there.
- Tables are placed in special ROM blob (not mapped into guest memory)
which is automatically migrated together with the guest, same
as BIOS code.
- Offsets where hardware configuration is loaded in ACPI tables
are also migrated, this is in case future ACPI changes make us
rearrange the tables in memory.
This patch reuses some code from SeaBIOS, which was originally under
LGPLv2 and then relicensed to GPLv3 or LGPLv3, in QEMU under GPLv2+. This
relicensing has been acked by all contributors that had contributed to the
code since the v2->v3 relicense. ACKs approving the v2+ relicensing are
listed below. The list might include ACKs from people not holding
copyright on any parts of the reused code, but it's better to err on the
side of caution and include them.
Affected SeaBIOS files (GPLv2+ license headers added)
<http://thread.gmane.org/gmane.comp.bios.coreboot.seabios/5949>:
src/acpi-dsdt-cpu-hotplug.dsl
src/acpi-dsdt-dbug.dsl
src/acpi-dsdt-hpet.dsl
src/acpi-dsdt-isa.dsl
src/acpi-dsdt-pci-crs.dsl
src/acpi.c
src/acpi.h
src/ssdt-misc.dsl
src/ssdt-pcihp.dsl
src/ssdt-proc.dsl
tools/acpi_extract.py
tools/acpi_extract_preprocess.py
Each one of the listed people agreed to the following:
> If you allow the use of your contribution in QEMU under the
> terms of GPLv2 or later as proposed by this patch,
> please respond to this mail including the line:
>
> Acked-by: Name <email address>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jason Baron <jbaron@akamai.com>
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Gleb Natapov <gleb@redhat.com>
Acked-by: Marcelo Tosatti <mtosatti@redhat.com>
Acked-by: Dave Frodin <dave.frodin@se-eng.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Kevin O'Connor <kevin@koconnor.net>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Magnus Christensson <magnus.christensson@intel.com>
Acked-by: Hu Tao <hutao@cn.fujitsu.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-24 15:56:14 +00:00
|
|
|
static bool has_acpi_build = true;
|
2014-04-23 13:42:38 +00:00
|
|
|
static bool smbios_defaults = true;
|
2014-04-23 13:42:42 +00:00
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|
|
static bool smbios_legacy_mode;
|
2013-12-16 11:55:06 +00:00
|
|
|
/* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
|
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|
|
* host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
|
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|
|
* pages in the host.
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|
|
|
*/
|
2013-12-16 09:11:28 +00:00
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|
|
static bool gigabyte_align = true;
|
2014-06-02 13:25:10 +00:00
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|
static bool has_reserved_memory = true;
|
2013-04-26 03:24:46 +00:00
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|
2012-11-14 20:54:06 +00:00
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|
|
/* PC hardware initialisation */
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_q35_init(MachineState *machine)
|
2012-11-14 20:54:06 +00:00
|
|
|
{
|
2014-06-02 13:25:24 +00:00
|
|
|
PCMachineState *pc_machine = PC_MACHINE(machine);
|
2012-11-14 20:54:06 +00:00
|
|
|
ram_addr_t below_4g_mem_size, above_4g_mem_size;
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|
|
Q35PCIHost *q35_host;
|
2013-07-01 10:18:22 +00:00
|
|
|
PCIHostState *phb;
|
2012-11-14 20:54:06 +00:00
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PCIBus *host_bus;
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PCIDevice *lpc;
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|
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BusState *idebus[MAX_SATA_PORTS];
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ISADevice *rtc_state;
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ISADevice *floppy;
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MemoryRegion *pci_memory;
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MemoryRegion *rom_memory;
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MemoryRegion *ram_memory;
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GSIState *gsi_state;
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ISABus *isa_bus;
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int pci_enabled = 1;
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qemu_irq *cpu_irq;
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qemu_irq *gsi;
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|
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qemu_irq *i8259;
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int i;
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ICH9LPCState *ich9_lpc;
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PCIDevice *ahci;
|
2013-04-29 15:02:50 +00:00
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DeviceState *icc_bridge;
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2013-05-30 09:57:26 +00:00
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PcGuestInfo *guest_info;
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2014-06-20 01:40:25 +00:00
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ram_addr_t lowmem;
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2013-04-29 15:02:50 +00:00
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2013-12-16 11:55:06 +00:00
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/* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
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* and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
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* also known as MMCFG).
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* If it doesn't, we need to split it in chunks below and above 4G.
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* In any case, try to make sure that guest addresses aligned at
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* 1G boundaries get mapped to host addresses aligned at 1G boundaries.
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* For old machine types, use whatever split we used historically to avoid
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* breaking migration.
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*/
|
2014-05-07 14:42:57 +00:00
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if (machine->ram_size >= 0xb0000000) {
|
2014-06-20 01:40:25 +00:00
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lowmem = gigabyte_align ? 0x80000000 : 0xb0000000;
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} else {
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lowmem = 0xb0000000;
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|
}
|
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/* Handle the machine opt max-ram-below-4g. It is basicly doing
|
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* min(qemu limit, user limit).
|
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|
*/
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if (lowmem > pc_machine->max_ram_below_4g) {
|
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lowmem = pc_machine->max_ram_below_4g;
|
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|
|
if (machine->ram_size - lowmem > lowmem &&
|
|
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lowmem & ((1ULL << 30) - 1)) {
|
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|
error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64
|
|
|
|
") not a multiple of 1G; possible bad performance.",
|
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|
|
pc_machine->max_ram_below_4g);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (machine->ram_size >= lowmem) {
|
2014-05-07 14:42:57 +00:00
|
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|
above_4g_mem_size = machine->ram_size - lowmem;
|
2013-12-16 09:11:28 +00:00
|
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|
below_4g_mem_size = lowmem;
|
2012-11-14 20:54:06 +00:00
|
|
|
} else {
|
|
|
|
above_4g_mem_size = 0;
|
2014-05-07 14:42:57 +00:00
|
|
|
below_4g_mem_size = machine->ram_size;
|
2012-11-14 20:54:06 +00:00
|
|
|
}
|
|
|
|
|
2014-06-20 01:40:24 +00:00
|
|
|
if (xen_enabled() && xen_hvm_init(&below_4g_mem_size, &above_4g_mem_size,
|
|
|
|
&ram_memory) != 0) {
|
|
|
|
fprintf(stderr, "xen hardware virtual machine initialisation failed\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE);
|
|
|
|
object_property_add_child(qdev_get_machine(), "icc-bridge",
|
|
|
|
OBJECT(icc_bridge), NULL);
|
|
|
|
|
|
|
|
pc_cpus_init(machine->cpu_model, icc_bridge);
|
|
|
|
pc_acpi_init("q35-acpi-dsdt.aml");
|
|
|
|
|
|
|
|
kvmclock_create();
|
|
|
|
|
2012-11-14 20:54:06 +00:00
|
|
|
/* pci enabled */
|
|
|
|
if (pci_enabled) {
|
|
|
|
pci_memory = g_new(MemoryRegion, 1);
|
2013-11-06 18:18:08 +00:00
|
|
|
memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
|
2012-11-14 20:54:06 +00:00
|
|
|
rom_memory = pci_memory;
|
|
|
|
} else {
|
|
|
|
pci_memory = NULL;
|
|
|
|
rom_memory = get_system_memory();
|
|
|
|
}
|
|
|
|
|
2013-05-30 09:57:26 +00:00
|
|
|
guest_info = pc_guest_info_init(below_4g_mem_size, above_4g_mem_size);
|
2013-05-13 17:00:23 +00:00
|
|
|
guest_info->has_pci_info = has_pci_info;
|
2013-08-09 17:35:02 +00:00
|
|
|
guest_info->isapc_ram_fw = false;
|
i386: ACPI table generation code from seabios
This adds C code for generating ACPI tables at runtime,
imported from seabios git tree
commit 51684b7ced75fb76776e8ee84833fcfb6ecf12dd
Although ACPI tables come from a system BIOS on real hw,
it makes sense that the ACPI tables are coupled with the
virtual machine, since they have to abstract the x86 machine to
the OS's.
This is widely desired as a way to avoid the churn
and proliferation of QEMU-specific interfaces
associated with ACPI tables in bios code.
Notes:
As BIOS can reprogram devices prior to loading
ACPI tables, we pre-format ACPI tables but defer loading
hardware configuration there until tables are loaded.
The code structure was intentionally kept as close
to the seabios original as possible, to simplify
comparison and making sure we didn't lose anything
in translation.
Minor code duplication results, to help ensure there are no functional
regressions, I think it's better to merge it like this and do more code
changes in follow-up patches.
Cross-version compatibility concerns have been addressed:
ACPI tables are exposed to guest as FW_CFG entries.
When running with -M 1.5 and older, this patch disables ACPI
table generation, and doesn't expose ACPI
tables to guest.
As table content is likely to change over time,
the following measures are taken to simplify
cross-version migration:
- All tables besides the RSDP are packed in a single FW CFG entry.
This entry size is currently 23K. We round it up to 64K
to avoid too much churn there.
- Tables are placed in special ROM blob (not mapped into guest memory)
which is automatically migrated together with the guest, same
as BIOS code.
- Offsets where hardware configuration is loaded in ACPI tables
are also migrated, this is in case future ACPI changes make us
rearrange the tables in memory.
This patch reuses some code from SeaBIOS, which was originally under
LGPLv2 and then relicensed to GPLv3 or LGPLv3, in QEMU under GPLv2+. This
relicensing has been acked by all contributors that had contributed to the
code since the v2->v3 relicense. ACKs approving the v2+ relicensing are
listed below. The list might include ACKs from people not holding
copyright on any parts of the reused code, but it's better to err on the
side of caution and include them.
Affected SeaBIOS files (GPLv2+ license headers added)
<http://thread.gmane.org/gmane.comp.bios.coreboot.seabios/5949>:
src/acpi-dsdt-cpu-hotplug.dsl
src/acpi-dsdt-dbug.dsl
src/acpi-dsdt-hpet.dsl
src/acpi-dsdt-isa.dsl
src/acpi-dsdt-pci-crs.dsl
src/acpi.c
src/acpi.h
src/ssdt-misc.dsl
src/ssdt-pcihp.dsl
src/ssdt-proc.dsl
tools/acpi_extract.py
tools/acpi_extract_preprocess.py
Each one of the listed people agreed to the following:
> If you allow the use of your contribution in QEMU under the
> terms of GPLv2 or later as proposed by this patch,
> please respond to this mail including the line:
>
> Acked-by: Name <email address>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jason Baron <jbaron@akamai.com>
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Gleb Natapov <gleb@redhat.com>
Acked-by: Marcelo Tosatti <mtosatti@redhat.com>
Acked-by: Dave Frodin <dave.frodin@se-eng.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Kevin O'Connor <kevin@koconnor.net>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Magnus Christensson <magnus.christensson@intel.com>
Acked-by: Hu Tao <hutao@cn.fujitsu.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-24 15:56:14 +00:00
|
|
|
guest_info->has_acpi_build = has_acpi_build;
|
2014-06-02 13:25:10 +00:00
|
|
|
guest_info->has_reserved_memory = has_reserved_memory;
|
2013-05-30 09:57:26 +00:00
|
|
|
|
2014-04-23 13:42:38 +00:00
|
|
|
if (smbios_defaults) {
|
2014-05-07 14:42:57 +00:00
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
2013-10-30 12:56:40 +00:00
|
|
|
/* These values are guest ABI, do not change */
|
2014-04-23 13:42:38 +00:00
|
|
|
smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
|
2014-05-07 14:42:57 +00:00
|
|
|
mc->name, smbios_legacy_mode);
|
2013-10-30 12:56:40 +00:00
|
|
|
}
|
|
|
|
|
2012-11-14 20:54:06 +00:00
|
|
|
/* allocate ram and load rom/bios */
|
|
|
|
if (!xen_enabled()) {
|
2014-06-10 11:15:17 +00:00
|
|
|
pc_memory_init(machine, get_system_memory(),
|
2013-08-21 18:14:41 +00:00
|
|
|
below_4g_mem_size, above_4g_mem_size,
|
2013-05-30 09:57:26 +00:00
|
|
|
rom_memory, &ram_memory, guest_info);
|
2012-11-14 20:54:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* irq lines */
|
|
|
|
gsi_state = g_malloc0(sizeof(*gsi_state));
|
|
|
|
if (kvm_irqchip_in_kernel()) {
|
|
|
|
kvm_pc_setup_irq_routing(pci_enabled);
|
|
|
|
gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
|
|
|
|
GSI_NUM_PINS);
|
|
|
|
} else {
|
|
|
|
gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* create pci host bus */
|
|
|
|
q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
|
|
|
|
|
2013-07-29 14:47:54 +00:00
|
|
|
object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host), NULL);
|
2012-11-14 20:54:06 +00:00
|
|
|
q35_host->mch.ram_memory = ram_memory;
|
|
|
|
q35_host->mch.pci_address_space = pci_memory;
|
|
|
|
q35_host->mch.system_memory = get_system_memory();
|
2013-05-09 07:53:50 +00:00
|
|
|
q35_host->mch.address_space_io = get_system_io();
|
2012-11-14 20:54:06 +00:00
|
|
|
q35_host->mch.below_4g_mem_size = below_4g_mem_size;
|
|
|
|
q35_host->mch.above_4g_mem_size = above_4g_mem_size;
|
2013-05-30 09:57:26 +00:00
|
|
|
q35_host->mch.guest_info = guest_info;
|
2012-11-14 20:54:06 +00:00
|
|
|
/* pci */
|
|
|
|
qdev_init_nofail(DEVICE(q35_host));
|
2013-07-01 10:18:22 +00:00
|
|
|
phb = PCI_HOST_BRIDGE(q35_host);
|
|
|
|
host_bus = phb->bus;
|
2012-11-14 20:54:06 +00:00
|
|
|
/* create ISA bus */
|
|
|
|
lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
|
|
|
|
ICH9_LPC_FUNC), true,
|
|
|
|
TYPE_ICH9_LPC_DEVICE);
|
2014-06-02 13:25:24 +00:00
|
|
|
|
|
|
|
object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
|
|
|
|
TYPE_HOTPLUG_HANDLER,
|
|
|
|
(Object **)&pc_machine->acpi_dev,
|
|
|
|
object_property_allow_set_link,
|
|
|
|
OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
|
|
|
|
object_property_set_link(OBJECT(machine), OBJECT(lpc),
|
|
|
|
PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
|
|
|
|
|
2012-11-14 20:54:06 +00:00
|
|
|
ich9_lpc = ICH9_LPC_DEVICE(lpc);
|
|
|
|
ich9_lpc->pic = gsi;
|
|
|
|
ich9_lpc->ioapic = gsi_state->ioapic_irq;
|
|
|
|
pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
|
|
|
|
ICH9_LPC_NB_PIRQS);
|
2013-01-23 02:11:37 +00:00
|
|
|
pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
|
2012-11-14 20:54:06 +00:00
|
|
|
isa_bus = ich9_lpc->isa_bus;
|
|
|
|
|
|
|
|
/*end early*/
|
|
|
|
isa_bus_irqs(isa_bus, gsi);
|
|
|
|
|
|
|
|
if (kvm_irqchip_in_kernel()) {
|
|
|
|
i8259 = kvm_i8259_init(isa_bus);
|
|
|
|
} else if (xen_enabled()) {
|
|
|
|
i8259 = xen_interrupt_controller_init();
|
|
|
|
} else {
|
|
|
|
cpu_irq = pc_allocate_cpu_irq();
|
|
|
|
i8259 = i8259_init(isa_bus, cpu_irq[0]);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ISA_NUM_IRQS; i++) {
|
|
|
|
gsi_state->i8259_irq[i] = i8259[i];
|
|
|
|
}
|
|
|
|
if (pci_enabled) {
|
|
|
|
ioapic_init_gsi(gsi_state, NULL);
|
|
|
|
}
|
2013-04-29 15:02:50 +00:00
|
|
|
qdev_init_nofail(icc_bridge);
|
2012-11-14 20:54:06 +00:00
|
|
|
|
|
|
|
pc_register_ferr_irq(gsi[13]);
|
|
|
|
|
|
|
|
/* init basic PC hardware */
|
2013-12-08 09:38:17 +00:00
|
|
|
pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false, 0xff0104);
|
2012-11-14 20:54:06 +00:00
|
|
|
|
|
|
|
/* connect pm stuff to lpc */
|
2013-04-24 10:37:22 +00:00
|
|
|
ich9_lpc_pm_init(lpc);
|
2012-11-14 20:54:06 +00:00
|
|
|
|
|
|
|
/* ahci and SATA device, for q35 1 ahci controller is built-in */
|
|
|
|
ahci = pci_create_simple_multifunction(host_bus,
|
|
|
|
PCI_DEVFN(ICH9_SATA1_DEV,
|
|
|
|
ICH9_SATA1_FUNC),
|
|
|
|
true, "ich9-ahci");
|
|
|
|
idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
|
|
|
|
idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
|
|
|
|
|
|
|
|
if (usb_enabled(false)) {
|
|
|
|
/* Should we create 6 UHCI according to ich9 spec? */
|
|
|
|
ehci_create_ich9_with_companions(host_bus, 0x1d);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* TODO: Populate SPD eeprom data. */
|
|
|
|
smbus_eeprom_init(ich9_smb_init(host_bus,
|
|
|
|
PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
|
|
|
|
0xb100),
|
|
|
|
8, NULL, 0);
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, machine->boot_order,
|
2012-11-14 20:54:06 +00:00
|
|
|
floppy, idebus[0], idebus[1], rtc_state);
|
|
|
|
|
|
|
|
/* the rest devices to which pci devfn is automatically assigned */
|
|
|
|
pc_vga_init(isa_bus, host_bus);
|
|
|
|
pc_nic_init(isa_bus, host_bus);
|
|
|
|
if (pci_enabled) {
|
|
|
|
pc_pci_device_init(host_bus);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_compat_2_0(MachineState *machine)
|
2014-04-24 10:14:53 +00:00
|
|
|
{
|
2014-04-23 13:42:42 +00:00
|
|
|
smbios_legacy_mode = true;
|
2014-06-02 13:25:10 +00:00
|
|
|
has_reserved_memory = false;
|
2014-04-24 10:14:53 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_compat_1_7(MachineState *machine)
|
2013-10-30 12:56:40 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_2_0(machine);
|
2014-04-23 13:42:38 +00:00
|
|
|
smbios_defaults = false;
|
2013-12-16 09:11:28 +00:00
|
|
|
gigabyte_align = false;
|
2014-03-06 12:57:09 +00:00
|
|
|
option_rom_has_mr = true;
|
2014-02-19 14:58:12 +00:00
|
|
|
x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC);
|
2013-10-30 12:56:40 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_compat_1_6(MachineState *machine)
|
2013-05-13 17:00:23 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_1_7(machine);
|
2013-05-13 17:00:23 +00:00
|
|
|
has_pci_info = false;
|
2014-03-09 16:42:06 +00:00
|
|
|
rom_file_has_mr = false;
|
i386: ACPI table generation code from seabios
This adds C code for generating ACPI tables at runtime,
imported from seabios git tree
commit 51684b7ced75fb76776e8ee84833fcfb6ecf12dd
Although ACPI tables come from a system BIOS on real hw,
it makes sense that the ACPI tables are coupled with the
virtual machine, since they have to abstract the x86 machine to
the OS's.
This is widely desired as a way to avoid the churn
and proliferation of QEMU-specific interfaces
associated with ACPI tables in bios code.
Notes:
As BIOS can reprogram devices prior to loading
ACPI tables, we pre-format ACPI tables but defer loading
hardware configuration there until tables are loaded.
The code structure was intentionally kept as close
to the seabios original as possible, to simplify
comparison and making sure we didn't lose anything
in translation.
Minor code duplication results, to help ensure there are no functional
regressions, I think it's better to merge it like this and do more code
changes in follow-up patches.
Cross-version compatibility concerns have been addressed:
ACPI tables are exposed to guest as FW_CFG entries.
When running with -M 1.5 and older, this patch disables ACPI
table generation, and doesn't expose ACPI
tables to guest.
As table content is likely to change over time,
the following measures are taken to simplify
cross-version migration:
- All tables besides the RSDP are packed in a single FW CFG entry.
This entry size is currently 23K. We round it up to 64K
to avoid too much churn there.
- Tables are placed in special ROM blob (not mapped into guest memory)
which is automatically migrated together with the guest, same
as BIOS code.
- Offsets where hardware configuration is loaded in ACPI tables
are also migrated, this is in case future ACPI changes make us
rearrange the tables in memory.
This patch reuses some code from SeaBIOS, which was originally under
LGPLv2 and then relicensed to GPLv3 or LGPLv3, in QEMU under GPLv2+. This
relicensing has been acked by all contributors that had contributed to the
code since the v2->v3 relicense. ACKs approving the v2+ relicensing are
listed below. The list might include ACKs from people not holding
copyright on any parts of the reused code, but it's better to err on the
side of caution and include them.
Affected SeaBIOS files (GPLv2+ license headers added)
<http://thread.gmane.org/gmane.comp.bios.coreboot.seabios/5949>:
src/acpi-dsdt-cpu-hotplug.dsl
src/acpi-dsdt-dbug.dsl
src/acpi-dsdt-hpet.dsl
src/acpi-dsdt-isa.dsl
src/acpi-dsdt-pci-crs.dsl
src/acpi.c
src/acpi.h
src/ssdt-misc.dsl
src/ssdt-pcihp.dsl
src/ssdt-proc.dsl
tools/acpi_extract.py
tools/acpi_extract_preprocess.py
Each one of the listed people agreed to the following:
> If you allow the use of your contribution in QEMU under the
> terms of GPLv2 or later as proposed by this patch,
> please respond to this mail including the line:
>
> Acked-by: Name <email address>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jason Baron <jbaron@akamai.com>
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Gleb Natapov <gleb@redhat.com>
Acked-by: Marcelo Tosatti <mtosatti@redhat.com>
Acked-by: Dave Frodin <dave.frodin@se-eng.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Kevin O'Connor <kevin@koconnor.net>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Magnus Christensson <magnus.christensson@intel.com>
Acked-by: Hu Tao <hutao@cn.fujitsu.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-24 15:56:14 +00:00
|
|
|
has_acpi_build = false;
|
2013-05-13 17:00:23 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_compat_1_5(MachineState *machine)
|
2013-08-01 12:39:11 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_1_6(machine);
|
2013-08-01 12:39:11 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_compat_1_4(MachineState *machine)
|
pc: Kill the "use flash device for BIOS unless KVM" misfeature
Use of a flash memory device for the BIOS was added in series "[PATCH
v10 0/8] PC system flash support", commit 4732dca..1b89faf, v1.1.
Flash vs. ROM is a guest-visible difference. Thus, flash use had to
be suppressed for machine types pc-1.0 and older. This was
accomplished by adding a dummy device "pc-sysfw" with property
"rom_only":
* Non-zero rom_only means "use ROM". Default for pc-1.0 and older.
* Zero rom_only means "maybe use flash". Default for newer machines.
Not only is the dummy device ugly, it was also retroactively added to
the older machine types! Fortunately, it's not guest-visible (thus no
immediate guest ABI breakage), and has no vmstate (thus no immediate
migration breakage). Breakage occurs only if the user unwisely
enables flash by setting rom_only to zero. Patch review FAIL #1.
Why "maybe use flash"? Flash didn't (and still doesn't) work with
KVM. Therefore, rom_only=0 really means "use flash, except when KVM
is enabled, use ROM". This is a Bad Idea, because it makes enabling/
disabling KVM guest-visible. Patch review FAIL #2.
Aside: it also precludes migrating between KVM on and off, but that's
not possible for other reasons anyway.
Fix as follows:
1. Change the meaning of rom_only=0 to mean "use flash, no ifs, buts,
or maybes" for pc-i440fx-1.5 and pc-q35-1.5. Don't change anything
for older machines (to remain bug-compatible).
2. Change the default value from 0 to 1 for these machines.
Necessary, because 0 doesn't work with KVM. Once it does, we can flip
the default back to 0.
3. Don't revert the retroactive addition of device "pc-sysfw" to older
machine types. Seems not worth the trouble.
4. Add a TODO comment asking for device "pc-sysfw" to be dropped once
flash works with KVM.
Net effect is that you get a BIOS ROM again even when KVM is disabled,
just like for machines predating the introduction of flash.
To get flash instead, use "--global pc-sysfw.rom_only=0".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id: 1365780303-26398-4-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-12 15:25:03 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_1_5(machine);
|
2013-04-25 18:43:04 +00:00
|
|
|
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
|
2013-08-09 14:11:36 +00:00
|
|
|
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
|
2013-08-21 18:14:43 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_q35_init_2_0(MachineState *machine)
|
2014-04-24 10:14:53 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_2_0(machine);
|
|
|
|
pc_q35_init(machine);
|
2014-04-24 10:14:53 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_q35_init_1_7(MachineState *machine)
|
2013-10-30 12:56:40 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_1_7(machine);
|
|
|
|
pc_q35_init(machine);
|
2013-10-30 12:56:40 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_q35_init_1_6(MachineState *machine)
|
2013-08-21 18:14:43 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_1_6(machine);
|
|
|
|
pc_q35_init(machine);
|
2013-08-21 18:14:43 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_q35_init_1_5(MachineState *machine)
|
2013-08-21 18:14:43 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_1_5(machine);
|
|
|
|
pc_q35_init(machine);
|
2013-08-21 18:14:43 +00:00
|
|
|
}
|
|
|
|
|
2014-05-07 14:42:57 +00:00
|
|
|
static void pc_q35_init_1_4(MachineState *machine)
|
2013-08-21 18:14:43 +00:00
|
|
|
{
|
2014-05-07 14:42:57 +00:00
|
|
|
pc_compat_1_4(machine);
|
|
|
|
pc_q35_init(machine);
|
pc: Kill the "use flash device for BIOS unless KVM" misfeature
Use of a flash memory device for the BIOS was added in series "[PATCH
v10 0/8] PC system flash support", commit 4732dca..1b89faf, v1.1.
Flash vs. ROM is a guest-visible difference. Thus, flash use had to
be suppressed for machine types pc-1.0 and older. This was
accomplished by adding a dummy device "pc-sysfw" with property
"rom_only":
* Non-zero rom_only means "use ROM". Default for pc-1.0 and older.
* Zero rom_only means "maybe use flash". Default for newer machines.
Not only is the dummy device ugly, it was also retroactively added to
the older machine types! Fortunately, it's not guest-visible (thus no
immediate guest ABI breakage), and has no vmstate (thus no immediate
migration breakage). Breakage occurs only if the user unwisely
enables flash by setting rom_only to zero. Patch review FAIL #1.
Why "maybe use flash"? Flash didn't (and still doesn't) work with
KVM. Therefore, rom_only=0 really means "use flash, except when KVM
is enabled, use ROM". This is a Bad Idea, because it makes enabling/
disabling KVM guest-visible. Patch review FAIL #2.
Aside: it also precludes migrating between KVM on and off, but that's
not possible for other reasons anyway.
Fix as follows:
1. Change the meaning of rom_only=0 to mean "use flash, no ifs, buts,
or maybes" for pc-i440fx-1.5 and pc-q35-1.5. Don't change anything
for older machines (to remain bug-compatible).
2. Change the default value from 0 to 1 for these machines.
Necessary, because 0 doesn't work with KVM. Once it does, we can flip
the default back to 0.
3. Don't revert the retroactive addition of device "pc-sysfw" to older
machine types. Seems not worth the trouble.
4. Add a TODO comment asking for device "pc-sysfw" to be dropped once
flash works with KVM.
Net effect is that you get a BIOS ROM again even when KVM is disabled,
just like for machines predating the introduction of flash.
To get flash instead, use "--global pc-sysfw.rom_only=0".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id: 1365780303-26398-4-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-12 15:25:03 +00:00
|
|
|
}
|
|
|
|
|
2013-08-27 06:48:06 +00:00
|
|
|
#define PC_Q35_MACHINE_OPTIONS \
|
|
|
|
PC_DEFAULT_MACHINE_OPTIONS, \
|
|
|
|
.desc = "Standard PC (Q35 + ICH9, 2009)", \
|
|
|
|
.hot_add_cpu = pc_hot_add_cpu
|
|
|
|
|
2014-04-24 10:14:53 +00:00
|
|
|
#define PC_Q35_2_1_MACHINE_OPTIONS \
|
2013-12-02 11:52:04 +00:00
|
|
|
PC_Q35_MACHINE_OPTIONS, \
|
|
|
|
.default_machine_opts = "firmware=bios-256k.bin"
|
2013-12-02 11:47:29 +00:00
|
|
|
|
2014-04-24 10:14:53 +00:00
|
|
|
static QEMUMachine pc_q35_machine_v2_1 = {
|
|
|
|
PC_Q35_2_1_MACHINE_OPTIONS,
|
|
|
|
.name = "pc-q35-2.1",
|
|
|
|
.alias = "q35",
|
|
|
|
.init = pc_q35_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
#define PC_Q35_2_0_MACHINE_OPTIONS PC_Q35_2_1_MACHINE_OPTIONS
|
|
|
|
|
2013-12-02 11:47:29 +00:00
|
|
|
static QEMUMachine pc_q35_machine_v2_0 = {
|
|
|
|
PC_Q35_2_0_MACHINE_OPTIONS,
|
|
|
|
.name = "pc-q35-2.0",
|
2014-04-24 10:14:53 +00:00
|
|
|
.init = pc_q35_init_2_0,
|
2014-05-05 14:52:50 +00:00
|
|
|
.compat_props = (GlobalProperty[]) {
|
pc: Move q35 compat props to PC_COMPAT_*
For each compat property on PC_Q35_COMPAT_*, there are only two
possibilities:
* If the device is never instantiated when using a machine other than
pc-q35, then the compat property can be safely added to
PC_COMPAT_*;
* If the device can be instantiated when using a machine other than
pc-q35, that means the other machines also need the compat property
to be set.
That means we don't need separate PC_Q35_COMPAT_* macros at all, today.
The hpet.hpet-intcap case is interesting: piix and q35 do have something
that emulates different defaults, but the machine-specific default is
applied _after_ compat_props are applied, by simply checking if the
property is zero (which is the real default on the hpet code).
The hpet.hpet-intcap=0x4 compat property can (should?) be applied to
piix too, because 0x4 was the default on both piix and q35 before the
hpet-intcap property was introduced.
Now, if one day we change the default HPET intcap on one of the PC
machine-types again, we may want to introduce PC_{Q35,I440FX}_COMPAT
macros. But while we don't need that, we can keep the code simple.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-25 02:04:44 +00:00
|
|
|
PC_COMPAT_2_0,
|
2014-05-05 14:52:50 +00:00
|
|
|
{ /* end of list */ }
|
|
|
|
},
|
2013-12-02 11:47:29 +00:00
|
|
|
};
|
|
|
|
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 16:30:52 +00:00
|
|
|
#define PC_Q35_1_7_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
|
|
|
|
|
|
|
|
static QEMUMachine pc_q35_machine_v1_7 = {
|
|
|
|
PC_Q35_1_7_MACHINE_OPTIONS,
|
|
|
|
.name = "pc-q35-1.7",
|
2013-12-08 09:38:17 +00:00
|
|
|
.init = pc_q35_init_1_7,
|
|
|
|
.compat_props = (GlobalProperty[]) {
|
pc: Move q35 compat props to PC_COMPAT_*
For each compat property on PC_Q35_COMPAT_*, there are only two
possibilities:
* If the device is never instantiated when using a machine other than
pc-q35, then the compat property can be safely added to
PC_COMPAT_*;
* If the device can be instantiated when using a machine other than
pc-q35, that means the other machines also need the compat property
to be set.
That means we don't need separate PC_Q35_COMPAT_* macros at all, today.
The hpet.hpet-intcap case is interesting: piix and q35 do have something
that emulates different defaults, but the machine-specific default is
applied _after_ compat_props are applied, by simply checking if the
property is zero (which is the real default on the hpet code).
The hpet.hpet-intcap=0x4 compat property can (should?) be applied to
piix too, because 0x4 was the default on both piix and q35 before the
hpet-intcap property was introduced.
Now, if one day we change the default HPET intcap on one of the PC
machine-types again, we may want to introduce PC_{Q35,I440FX}_COMPAT
macros. But while we don't need that, we can keep the code simple.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-25 02:04:44 +00:00
|
|
|
PC_COMPAT_1_7,
|
2013-12-08 09:38:17 +00:00
|
|
|
{ /* end of list */ }
|
|
|
|
},
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 16:30:52 +00:00
|
|
|
};
|
|
|
|
|
2013-08-27 06:48:06 +00:00
|
|
|
#define PC_Q35_1_6_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
|
|
|
|
|
2013-05-27 20:23:53 +00:00
|
|
|
static QEMUMachine pc_q35_machine_v1_6 = {
|
2013-08-27 06:48:06 +00:00
|
|
|
PC_Q35_1_6_MACHINE_OPTIONS,
|
2013-05-27 20:23:53 +00:00
|
|
|
.name = "pc-q35-1.6",
|
2013-08-01 12:39:11 +00:00
|
|
|
.init = pc_q35_init_1_6,
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 16:30:52 +00:00
|
|
|
.compat_props = (GlobalProperty[]) {
|
pc: Move q35 compat props to PC_COMPAT_*
For each compat property on PC_Q35_COMPAT_*, there are only two
possibilities:
* If the device is never instantiated when using a machine other than
pc-q35, then the compat property can be safely added to
PC_COMPAT_*;
* If the device can be instantiated when using a machine other than
pc-q35, that means the other machines also need the compat property
to be set.
That means we don't need separate PC_Q35_COMPAT_* macros at all, today.
The hpet.hpet-intcap case is interesting: piix and q35 do have something
that emulates different defaults, but the machine-specific default is
applied _after_ compat_props are applied, by simply checking if the
property is zero (which is the real default on the hpet code).
The hpet.hpet-intcap=0x4 compat property can (should?) be applied to
piix too, because 0x4 was the default on both piix and q35 before the
hpet-intcap property was introduced.
Now, if one day we change the default HPET intcap on one of the PC
machine-types again, we may want to introduce PC_{Q35,I440FX}_COMPAT
macros. But while we don't need that, we can keep the code simple.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-25 02:04:44 +00:00
|
|
|
PC_COMPAT_1_6,
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 16:30:52 +00:00
|
|
|
{ /* end of list */ }
|
|
|
|
},
|
2013-05-27 20:23:53 +00:00
|
|
|
};
|
|
|
|
|
2013-02-08 13:06:15 +00:00
|
|
|
static QEMUMachine pc_q35_machine_v1_5 = {
|
2013-08-27 06:48:06 +00:00
|
|
|
PC_Q35_1_6_MACHINE_OPTIONS,
|
2013-02-08 13:06:15 +00:00
|
|
|
.name = "pc-q35-1.5",
|
2013-05-13 17:00:23 +00:00
|
|
|
.init = pc_q35_init_1_5,
|
2013-05-27 20:23:54 +00:00
|
|
|
.compat_props = (GlobalProperty[]) {
|
pc: Move q35 compat props to PC_COMPAT_*
For each compat property on PC_Q35_COMPAT_*, there are only two
possibilities:
* If the device is never instantiated when using a machine other than
pc-q35, then the compat property can be safely added to
PC_COMPAT_*;
* If the device can be instantiated when using a machine other than
pc-q35, that means the other machines also need the compat property
to be set.
That means we don't need separate PC_Q35_COMPAT_* macros at all, today.
The hpet.hpet-intcap case is interesting: piix and q35 do have something
that emulates different defaults, but the machine-specific default is
applied _after_ compat_props are applied, by simply checking if the
property is zero (which is the real default on the hpet code).
The hpet.hpet-intcap=0x4 compat property can (should?) be applied to
piix too, because 0x4 was the default on both piix and q35 before the
hpet-intcap property was introduced.
Now, if one day we change the default HPET intcap on one of the PC
machine-types again, we may want to introduce PC_{Q35,I440FX}_COMPAT
macros. But while we don't need that, we can keep the code simple.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-25 02:04:44 +00:00
|
|
|
PC_COMPAT_1_5,
|
2013-05-27 20:23:54 +00:00
|
|
|
{ /* end of list */ }
|
|
|
|
},
|
2012-11-14 20:54:06 +00:00
|
|
|
};
|
|
|
|
|
2013-08-27 06:48:06 +00:00
|
|
|
#define PC_Q35_1_4_MACHINE_OPTIONS \
|
|
|
|
PC_Q35_1_6_MACHINE_OPTIONS, \
|
|
|
|
.hot_add_cpu = NULL
|
|
|
|
|
2013-02-08 13:06:15 +00:00
|
|
|
static QEMUMachine pc_q35_machine_v1_4 = {
|
2013-08-27 06:48:06 +00:00
|
|
|
PC_Q35_1_4_MACHINE_OPTIONS,
|
2013-02-08 13:06:15 +00:00
|
|
|
.name = "pc-q35-1.4",
|
pc: Kill the "use flash device for BIOS unless KVM" misfeature
Use of a flash memory device for the BIOS was added in series "[PATCH
v10 0/8] PC system flash support", commit 4732dca..1b89faf, v1.1.
Flash vs. ROM is a guest-visible difference. Thus, flash use had to
be suppressed for machine types pc-1.0 and older. This was
accomplished by adding a dummy device "pc-sysfw" with property
"rom_only":
* Non-zero rom_only means "use ROM". Default for pc-1.0 and older.
* Zero rom_only means "maybe use flash". Default for newer machines.
Not only is the dummy device ugly, it was also retroactively added to
the older machine types! Fortunately, it's not guest-visible (thus no
immediate guest ABI breakage), and has no vmstate (thus no immediate
migration breakage). Breakage occurs only if the user unwisely
enables flash by setting rom_only to zero. Patch review FAIL #1.
Why "maybe use flash"? Flash didn't (and still doesn't) work with
KVM. Therefore, rom_only=0 really means "use flash, except when KVM
is enabled, use ROM". This is a Bad Idea, because it makes enabling/
disabling KVM guest-visible. Patch review FAIL #2.
Aside: it also precludes migrating between KVM on and off, but that's
not possible for other reasons anyway.
Fix as follows:
1. Change the meaning of rom_only=0 to mean "use flash, no ifs, buts,
or maybes" for pc-i440fx-1.5 and pc-q35-1.5. Don't change anything
for older machines (to remain bug-compatible).
2. Change the default value from 0 to 1 for these machines.
Necessary, because 0 doesn't work with KVM. Once it does, we can flip
the default back to 0.
3. Don't revert the retroactive addition of device "pc-sysfw" to older
machine types. Seems not worth the trouble.
4. Add a TODO comment asking for device "pc-sysfw" to be dropped once
flash works with KVM.
Net effect is that you get a BIOS ROM again even when KVM is disabled,
just like for machines predating the introduction of flash.
To get flash instead, use "--global pc-sysfw.rom_only=0".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id: 1365780303-26398-4-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-12 15:25:03 +00:00
|
|
|
.init = pc_q35_init_1_4,
|
2013-02-08 13:06:15 +00:00
|
|
|
.compat_props = (GlobalProperty[]) {
|
pc: Move q35 compat props to PC_COMPAT_*
For each compat property on PC_Q35_COMPAT_*, there are only two
possibilities:
* If the device is never instantiated when using a machine other than
pc-q35, then the compat property can be safely added to
PC_COMPAT_*;
* If the device can be instantiated when using a machine other than
pc-q35, that means the other machines also need the compat property
to be set.
That means we don't need separate PC_Q35_COMPAT_* macros at all, today.
The hpet.hpet-intcap case is interesting: piix and q35 do have something
that emulates different defaults, but the machine-specific default is
applied _after_ compat_props are applied, by simply checking if the
property is zero (which is the real default on the hpet code).
The hpet.hpet-intcap=0x4 compat property can (should?) be applied to
piix too, because 0x4 was the default on both piix and q35 before the
hpet-intcap property was introduced.
Now, if one day we change the default HPET intcap on one of the PC
machine-types again, we may want to introduce PC_{Q35,I440FX}_COMPAT
macros. But while we don't need that, we can keep the code simple.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-25 02:04:44 +00:00
|
|
|
PC_COMPAT_1_4,
|
2013-02-08 13:06:15 +00:00
|
|
|
{ /* end of list */ }
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2012-11-14 20:54:06 +00:00
|
|
|
static void pc_q35_machine_init(void)
|
|
|
|
{
|
2014-06-02 13:24:57 +00:00
|
|
|
qemu_register_pc_machine(&pc_q35_machine_v2_1);
|
|
|
|
qemu_register_pc_machine(&pc_q35_machine_v2_0);
|
|
|
|
qemu_register_pc_machine(&pc_q35_machine_v1_7);
|
|
|
|
qemu_register_pc_machine(&pc_q35_machine_v1_6);
|
|
|
|
qemu_register_pc_machine(&pc_q35_machine_v1_5);
|
|
|
|
qemu_register_pc_machine(&pc_q35_machine_v1_4);
|
2012-11-14 20:54:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
machine_init(pc_q35_machine_init);
|