2016-12-15 19:26:14 +00:00
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/*
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* HPPA emulation cpu helpers for qemu.
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*
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* Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "fpu/softfloat.h"
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#include "exec/helper-proto.h"
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2017-10-09 19:35:48 +00:00
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target_ureg cpu_hppa_get_psw(CPUHPPAState *env)
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2016-12-15 19:26:14 +00:00
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{
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2017-10-09 19:35:48 +00:00
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target_ureg psw;
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2016-12-15 19:26:14 +00:00
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/* Fold carry bits down to 8 consecutive bits. */
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/* ??? Needs tweaking for hppa64. */
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/* .......b...c...d...e...f...g...h */
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psw = (env->psw_cb >> 4) & 0x01111111;
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/* .......b..bc..cd..de..ef..fg..gh */
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psw |= psw >> 3;
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/* .............bcd............efgh */
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psw |= (psw >> 6) & 0x000f000f;
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/* .........................bcdefgh */
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psw |= (psw >> 12) & 0xf;
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psw |= env->psw_cb_msb << 7;
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2017-10-08 23:00:40 +00:00
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psw = (psw & 0xff) << 8;
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2016-12-15 19:26:14 +00:00
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2017-10-08 23:00:40 +00:00
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psw |= env->psw_n * PSW_N;
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psw |= (env->psw_v < 0) * PSW_V;
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psw |= env->psw;
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2016-12-15 19:26:14 +00:00
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return psw;
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}
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2017-10-09 19:35:48 +00:00
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void cpu_hppa_put_psw(CPUHPPAState *env, target_ureg psw)
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2016-12-15 19:26:14 +00:00
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{
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2017-10-09 19:35:48 +00:00
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target_ureg cb = 0;
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2016-12-15 19:26:14 +00:00
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2017-10-08 23:00:40 +00:00
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env->psw = psw & ~(PSW_N | PSW_V | PSW_CB);
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env->psw_n = (psw / PSW_N) & 1;
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env->psw_v = -((psw / PSW_V) & 1);
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2016-12-15 19:26:14 +00:00
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env->psw_cb_msb = (psw >> 15) & 1;
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cb |= ((psw >> 14) & 1) << 28;
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cb |= ((psw >> 13) & 1) << 24;
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cb |= ((psw >> 12) & 1) << 20;
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cb |= ((psw >> 11) & 1) << 16;
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cb |= ((psw >> 10) & 1) << 12;
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cb |= ((psw >> 9) & 1) << 8;
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cb |= ((psw >> 8) & 1) << 4;
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env->psw_cb = cb;
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}
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void hppa_cpu_do_interrupt(CPUState *cs)
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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CPUHPPAState *env = &cpu->env;
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int i = cs->exception_index;
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if (qemu_loglevel_mask(CPU_LOG_INT)) {
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2017-10-11 17:03:02 +00:00
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static const char * const names[] = {
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[EXCP_HPMC] = "high priority machine check",
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[EXCP_POWER_FAIL] = "power fail interrupt",
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[EXCP_RC] = "recovery counter trap",
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[EXCP_EXT_INTERRUPT] = "external interrupt",
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[EXCP_LPMC] = "low priority machine check",
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[EXCP_ITLB_MISS] = "instruction tlb miss fault",
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[EXCP_IMP] = "instruction memory protection trap",
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[EXCP_ILL] = "illegal instruction trap",
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[EXCP_BREAK] = "break instruction trap",
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[EXCP_PRIV_OPR] = "privileged operation trap",
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[EXCP_PRIV_REG] = "privileged register trap",
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[EXCP_OVERFLOW] = "overflow trap",
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[EXCP_COND] = "conditional trap",
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[EXCP_ASSIST] = "assist exception trap",
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[EXCP_DTLB_MISS] = "data tlb miss fault",
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[EXCP_NA_ITLB_MISS] = "non-access instruction tlb miss",
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[EXCP_NA_DTLB_MISS] = "non-access data tlb miss",
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[EXCP_DMP] = "data memory protection trap",
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[EXCP_DMB] = "data memory break trap",
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[EXCP_TLB_DIRTY] = "tlb dirty bit trap",
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[EXCP_PAGE_REF] = "page reference trap",
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[EXCP_ASSIST_EMU] = "assist emulation trap",
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[EXCP_HPT] = "high-privilege transfer trap",
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[EXCP_LPT] = "low-privilege transfer trap",
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[EXCP_TB] = "taken branch trap",
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[EXCP_DMAR] = "data memory access rights trap",
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[EXCP_DMPI] = "data memory protection id trap",
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[EXCP_UNALIGN] = "unaligned data reference trap",
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[EXCP_PER_INTERRUPT] = "performance monitor interrupt",
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[EXCP_SYSCALL] = "syscall",
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[EXCP_SYSCALL_LWS] = "syscall-lws",
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};
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2016-12-15 19:26:14 +00:00
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static int count;
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2017-10-11 17:03:02 +00:00
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const char *name = NULL;
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if (i >= 0 && i < ARRAY_SIZE(names)) {
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name = names[i];
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}
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if (name) {
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qemu_log("INT %6d: %s ia_f=" TARGET_FMT_lx "\n",
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++count, name, env->iaoq_f);
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} else {
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qemu_log("INT %6d: unknown %d ia_f=" TARGET_FMT_lx "\n",
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++count, i, env->iaoq_f);
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2016-12-15 19:26:14 +00:00
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}
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}
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cs->exception_index = -1;
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}
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bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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{
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abort();
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return false;
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}
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void hppa_cpu_dump_state(CPUState *cs, FILE *f,
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fprintf_function cpu_fprintf, int flags)
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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CPUHPPAState *env = &cpu->env;
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2017-10-09 19:35:48 +00:00
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target_ureg psw = cpu_hppa_get_psw(env);
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target_ureg psw_cb;
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2017-10-08 23:00:40 +00:00
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char psw_c[20];
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2016-12-15 19:26:14 +00:00
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int i;
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2017-10-08 23:00:40 +00:00
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cpu_fprintf(f, "IA_F " TARGET_FMT_lx " IA_B " TARGET_FMT_lx "\n",
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2017-10-09 19:35:48 +00:00
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(target_ulong)env->iaoq_f, (target_ulong)env->iaoq_b);
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2017-10-08 23:00:40 +00:00
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psw_c[0] = (psw & PSW_W ? 'W' : '-');
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psw_c[1] = (psw & PSW_E ? 'E' : '-');
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psw_c[2] = (psw & PSW_S ? 'S' : '-');
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psw_c[3] = (psw & PSW_T ? 'T' : '-');
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psw_c[4] = (psw & PSW_H ? 'H' : '-');
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psw_c[5] = (psw & PSW_L ? 'L' : '-');
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psw_c[6] = (psw & PSW_N ? 'N' : '-');
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psw_c[7] = (psw & PSW_X ? 'X' : '-');
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psw_c[8] = (psw & PSW_B ? 'B' : '-');
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psw_c[9] = (psw & PSW_C ? 'C' : '-');
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psw_c[10] = (psw & PSW_V ? 'V' : '-');
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psw_c[11] = (psw & PSW_M ? 'M' : '-');
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psw_c[12] = (psw & PSW_F ? 'F' : '-');
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psw_c[13] = (psw & PSW_R ? 'R' : '-');
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psw_c[14] = (psw & PSW_Q ? 'Q' : '-');
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psw_c[15] = (psw & PSW_P ? 'P' : '-');
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psw_c[16] = (psw & PSW_D ? 'D' : '-');
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psw_c[17] = (psw & PSW_I ? 'I' : '-');
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psw_c[18] = '\0';
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psw_cb = ((env->psw_cb >> 4) & 0x01111111) | (env->psw_cb_msb << 28);
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2017-10-09 19:35:48 +00:00
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cpu_fprintf(f, "PSW " TREG_FMT_lx " CB " TREG_FMT_lx " %s\n",
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2017-10-08 23:00:40 +00:00
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psw, psw_cb, psw_c);
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for (i = 0; i < 32; i++) {
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2017-10-09 19:35:48 +00:00
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cpu_fprintf(f, "GR%02d " TREG_FMT_lx " ", i, env->gr[i]);
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2016-12-15 19:26:14 +00:00
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if ((i % 4) == 3) {
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cpu_fprintf(f, "\n");
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}
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}
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2017-10-08 23:00:40 +00:00
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cpu_fprintf(f, "\n");
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2016-12-15 19:26:14 +00:00
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/* ??? FR */
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}
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