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intel-iommu: ignore leaf SNP bit in scalable mode
When booting with scalable mode, I hit this error: qemu-system-x86_64: vtd_iova_to_slpte: detected splte reserve non-zero iova=0xfffff002, level=0x1slpte=0x102681803) qemu-system-x86_64: vtd_iommu_translate: detected translation failure (dev=01:00:00, iova=0xfffff002) qemu-system-x86_64: New fault is not recorded due to compression of faults This is because the SNP bit is set for second level page table since Linux kernel commit 6c00612d0cba1 ("iommu/vt-d: Report right snoop capability when using FL for IOVA") even if SC is not supported by the hardware. To unbreak the guest, ignore the leaf SNP bit for scalable mode first. In the future we may consider to add SC support. Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20211129033618.3857-1-jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com>
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@ -3629,6 +3629,12 @@ static void vtd_init(IntelIOMMUState *s)
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vtd_spte_rsvd_large[3] = VTD_SPTE_LPAGE_L3_RSVD_MASK(s->aw_bits,
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x86_iommu->dt_supported);
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if (s->scalable_mode) {
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vtd_spte_rsvd[1] &= ~VTD_SPTE_SNP;
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vtd_spte_rsvd_large[2] &= ~VTD_SPTE_SNP;
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vtd_spte_rsvd_large[3] &= ~VTD_SPTE_SNP;
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}
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if (x86_iommu_ir_supported(x86_iommu)) {
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s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;
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if (s->intr_eim == ON_OFF_AUTO_ON) {
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@ -388,6 +388,8 @@ typedef union VTDInvDesc VTDInvDesc;
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#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0fff8
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/* Rsvd field masks for spte */
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#define VTD_SPTE_SNP 0x800ULL
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#define VTD_SPTE_PAGE_L1_RSVD_MASK(aw, dt_supported) \
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dt_supported ? \
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(0x800ULL | ~(VTD_HAW_MASK(aw) | VTD_SL_IGN_COM | VTD_SL_TM)) : \
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