target/sh4: Update coding style to make checkpatch.pl happy

Avoid checkpatch.pl warnings in the next commit.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-10-27 00:13:00 +01:00
parent 45514b48df
commit 02b8e735c1
2 changed files with 10 additions and 6 deletions

View File

@ -398,9 +398,11 @@ float32 helper_fsrra_FT(CPUSH4State *env, float32 t0)
/* "Approximate" 1/sqrt(x) via actual computation. */
t0 = float32_sqrt(t0, &env->fp_status);
t0 = float32_div(float32_one, t0, &env->fp_status);
/* Since this is supposed to be an approximation, an imprecision
exception is required. One supposes this also follows the usual
IEEE rule that other exceptions take precidence. */
/*
* Since this is supposed to be an approximation, an imprecision
* exception is required. One supposes this also follows the usual
* IEEE rule that other exceptions take precidence.
*/
if (get_float_exception_flags(&env->fp_status) == 0) {
set_float_exception_flags(float_flag_inexact, &env->fp_status);
}

View File

@ -1959,9 +1959,11 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env)
NEXT_INSN;
switch (ctx->opcode & 0xf00f) {
case 0x6003: /* mov Rm,Rn */
/* Here we want to recognize ld_dst being saved for later consumtion,
or for another input register being copied so that ld_dst need not
be clobbered during the operation. */
/*
* Here we want to recognize ld_dst being saved for later consumtion,
* or for another input register being copied so that ld_dst need not
* be clobbered during the operation.
*/
op_dst = B11_8;
mv_src = B7_4;
if (op_dst == ld_dst) {