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intc/arm_gic: Implement virtualization extensions in gic_(deactivate|complete_irq)
Implement virtualization extensions in the gic_deactivate_irq() and gic_complete_irq() functions. When the guest writes an invalid vIRQ to V_EOIR or V_DIR, since the GICv2 specification is not entirely clear here, we adopt the behaviour observed on real hardware: * When V_CTRL.EOIMode is false (EOI split is disabled): - In case of an invalid vIRQ write to V_EOIR: -> If some bits are set in H_APR, an invalid vIRQ write to V_EOIR triggers a priority drop, and increments V_HCR.EOICount. -> If V_APR is already cleared, nothing happen - An invalid vIRQ write to V_DIR is ignored. * When V_CTRL.EOIMode is true: - In case of an invalid vIRQ write to V_EOIR: -> If some bits are set in H_APR, an invalid vIRQ write to V_EOIR triggers a priority drop. -> If V_APR is already cleared, nothing happen - An invalid vIRQ write to V_DIR increments V_HCR.EOICount. Signed-off-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20180727095421.386-13-luc.michel@greensocs.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -583,20 +583,19 @@ static void gic_deactivate_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
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{
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int group;
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if (irq >= s->num_irq) {
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if (irq >= GIC_MAXIRQ || (!gic_is_vcpu(cpu) && irq >= s->num_irq)) {
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/*
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* This handles two cases:
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* 1. If software writes the ID of a spurious interrupt [ie 1023]
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* to the GICC_DIR, the GIC ignores that write.
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* 2. If software writes the number of a non-existent interrupt
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* this must be a subcase of "value written is not an active interrupt"
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* and so this is UNPREDICTABLE. We choose to ignore it.
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* and so this is UNPREDICTABLE. We choose to ignore it. For vCPUs,
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* all IRQs potentially exist, so this limit does not apply.
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*/
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return;
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}
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group = gic_has_groups(s) && gic_test_group(s, irq, cpu);
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if (!gic_eoi_split(s, cpu, attrs)) {
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/* This is UNPREDICTABLE; we choose to ignore it */
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qemu_log_mask(LOG_GUEST_ERROR,
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@ -604,6 +603,17 @@ static void gic_deactivate_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
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return;
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}
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if (gic_is_vcpu(cpu) && !gic_virq_is_valid(s, irq, cpu)) {
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/* This vIRQ does not have an LR entry which is either active or
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* pending and active. Increment EOICount and ignore the write.
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*/
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int rcpu = gic_get_vcpu_real_id(cpu);
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s->h_hcr[rcpu] += 1 << R_GICH_HCR_EOICount_SHIFT;
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return;
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}
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group = gic_has_groups(s) && gic_test_group(s, irq, cpu);
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if (gic_cpu_ns_access(s, cpu, attrs) && !group) {
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DPRINTF("Non-secure DI for Group0 interrupt %d ignored\n", irq);
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return;
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@ -618,6 +628,39 @@ static void gic_complete_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
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int group;
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DPRINTF("EOI %d\n", irq);
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if (gic_is_vcpu(cpu)) {
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/* The call to gic_prio_drop() will clear a bit in GICH_APR iff the
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* running prio is < 0x100.
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*/
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bool prio_drop = s->running_priority[cpu] < 0x100;
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if (irq >= GIC_MAXIRQ) {
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/* Ignore spurious interrupt */
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return;
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}
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gic_drop_prio(s, cpu, 0);
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if (!gic_eoi_split(s, cpu, attrs)) {
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bool valid = gic_virq_is_valid(s, irq, cpu);
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if (prio_drop && !valid) {
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/* We are in a situation where:
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* - V_CTRL.EOIMode is false (no EOI split),
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* - The call to gic_drop_prio() cleared a bit in GICH_APR,
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* - This vIRQ does not have an LR entry which is either
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* active or pending and active.
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* In that case, we must increment EOICount.
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*/
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int rcpu = gic_get_vcpu_real_id(cpu);
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s->h_hcr[rcpu] += 1 << R_GICH_HCR_EOICount_SHIFT;
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} else if (valid) {
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gic_clear_active(s, irq, cpu);
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}
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}
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return;
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}
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if (irq >= s->num_irq) {
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/* This handles two cases:
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* 1. If software writes the ID of a spurious interrupt [ie 1023]
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