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Add a PAPR TCE-bypass mechanism for the pSeries machine
Usually, PAPR virtual IO devices use a virtual IOMMU mechanism, TCEs, to mediate all DMA transfers. While this is necessary for some sorts of operation, it can be complex to program and slow for others. This patch implements a mechanism for bypassing TCE translation, treating "IO" addresses as plain (guest) physical memory addresses. This has two main uses: * Simple, but 64-bit aware programs like firmwares can use the VIO devices without the complexity of TCE setup. * The guest OS can optionally use the TCE bypass to improve performance in suitable situations. The mechanism used is a per-device flag which disables TCE translation. The flag is toggled with some (hypervisor-implemented) RTAS methods. Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -226,6 +226,12 @@ int spapr_tce_dma_write(VIOsPAPRDevice *dev, uint64_t taddr, const void *buf,
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(unsigned long long)taddr, size);
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#endif
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/* Check for bypass */
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if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
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cpu_physical_memory_write(taddr, buf, size);
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return 0;
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}
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while (size) {
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uint64_t tce;
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uint32_t lsize;
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@ -313,6 +319,12 @@ int spapr_tce_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, void *buf,
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(unsigned long long)taddr, size);
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#endif
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/* Check for bypass */
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if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
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cpu_physical_memory_read(taddr, buf, size);
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return 0;
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}
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while (size) {
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uint64_t tce;
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uint32_t lsize;
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@ -513,6 +525,72 @@ int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq)
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return 0;
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}
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/* "quiesce" handling */
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static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev)
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{
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dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
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if (dev->rtce_table) {
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size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT)
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* sizeof(VIOsPAPR_RTCE);
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memset(dev->rtce_table, 0, size);
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}
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dev->crq.qladdr = 0;
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dev->crq.qsize = 0;
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dev->crq.qnext = 0;
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}
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static void rtas_set_tce_bypass(sPAPREnvironment *spapr, uint32_t token,
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uint32_t nargs, target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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VIOsPAPRBus *bus = spapr->vio_bus;
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VIOsPAPRDevice *dev;
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uint32_t unit, enable;
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if (nargs != 2) {
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rtas_st(rets, 0, -3);
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return;
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}
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unit = rtas_ld(args, 0);
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enable = rtas_ld(args, 1);
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dev = spapr_vio_find_by_reg(bus, unit);
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if (!dev) {
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rtas_st(rets, 0, -3);
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return;
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}
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if (enable) {
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dev->flags |= VIO_PAPR_FLAG_DMA_BYPASS;
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} else {
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dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
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}
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rtas_st(rets, 0, 0);
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}
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static void rtas_quiesce(sPAPREnvironment *spapr, uint32_t token,
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uint32_t nargs, target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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VIOsPAPRBus *bus = spapr->vio_bus;
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DeviceState *qdev;
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VIOsPAPRDevice *dev = NULL;
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if (nargs != 0) {
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rtas_st(rets, 0, -3);
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return;
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}
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QLIST_FOREACH(qdev, &bus->bus.children, sibling) {
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dev = (VIOsPAPRDevice *)qdev;
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spapr_vio_quiesce_one(dev);
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}
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rtas_st(rets, 0, 0);
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}
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static int spapr_vio_busdev_init(DeviceState *qdev, DeviceInfo *qinfo)
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{
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VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
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@ -591,6 +669,10 @@ VIOsPAPRBus *spapr_vio_bus_init(void)
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spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
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spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
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/* RTAS calls */
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spapr_rtas_register("ibm,set-tce-bypass", rtas_set_tce_bypass);
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spapr_rtas_register("quiesce", rtas_quiesce);
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for (qinfo = device_info_list; qinfo; qinfo = qinfo->next) {
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VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
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@ -48,6 +48,8 @@ typedef struct VIOsPAPR_CRQ {
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typedef struct VIOsPAPRDevice {
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DeviceState qdev;
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uint32_t reg;
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uint32_t flags;
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#define VIO_PAPR_FLAG_DMA_BYPASS 0x1
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qemu_irq qirq;
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uint32_t vio_irq_num;
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target_ulong signal_state;
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@ -104,4 +106,7 @@ void spapr_vlan_create(VIOsPAPRBus *bus, uint32_t reg, NICInfo *nd,
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void spapr_vscsi_create(VIOsPAPRBus *bus, uint32_t reg,
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qemu_irq qirq, uint32_t vio_irq_num);
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int spapr_tce_set_bypass(uint32_t unit, uint32_t enable);
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void spapr_vio_quiesce(void);
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#endif /* _HW_SPAPR_VIO_H */
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