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tcg-arm: Improve GUEST_BASE qemu_ld/st
If we pull the code to emit the actual load/store into a subroutine, we can share the reg+reg addressing mode code between softmmu and usermode. This lets us load GUEST_BASE into a temporary register rather than attempting to add it piece-wise to the address. Which lets us use movw+movt for armv7, rather than (up to) 4 adds. Code size for pre-armv7 stays the same. Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
15ecf6e394
commit
091d567771
@ -1367,33 +1367,11 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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}
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#endif /* SOFTMMU */
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static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
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static inline void tcg_out_qemu_ld_index(TCGContext *s, TCGMemOp opc,
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TCGReg datalo, TCGReg datahi,
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TCGReg addrlo, TCGReg addend)
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{
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TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));
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TCGMemOp opc, bswap;
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#ifdef CONFIG_SOFTMMU
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TCGMemOp s_bits;
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int mem_index;
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TCGReg addend;
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uint8_t *label_ptr;
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#endif
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datalo = *args++;
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datahi = (is64 ? *args++ : 0);
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addrlo = *args++;
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addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);
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opc = *args++;
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bswap = opc & MO_BSWAP;
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#ifdef CONFIG_SOFTMMU
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s_bits = opc & MO_SIZE;
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mem_index = *args;
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addend = tcg_out_tlb_read(s, addrlo, addrhi, s_bits, mem_index, 1);
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/* This a conditional BL only to load a pointer within this opcode into LR
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for the slow path. We will not be using the value for a tail call. */
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label_ptr = s->code_ptr;
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tcg_out_bl_noaddr(s, COND_NE);
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TCGMemOp bswap = opc & MO_BSWAP;
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switch (opc & MO_SSIZE) {
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case MO_UB:
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@ -1425,8 +1403,6 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
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break;
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case MO_Q:
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{
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/* Be careful not to modify datalo and datahi
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for the slow path below. */
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TCGReg dl = (bswap ? datahi : datalo);
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TCGReg dh = (bswap ? datalo : datahi);
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@ -1442,30 +1418,20 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
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tcg_out_ld32_12(s, COND_AL, dh, TCG_REG_TMP, 4);
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}
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if (bswap) {
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tcg_out_bswap32(s, COND_AL, dh, dh);
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tcg_out_bswap32(s, COND_AL, dl, dl);
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tcg_out_bswap32(s, COND_AL, dh, dh);
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}
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}
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break;
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}
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}
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add_qemu_ldst_label(s, 1, opc, datalo, datahi, addrlo, addrhi,
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mem_index, s->code_ptr, label_ptr);
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#else /* !CONFIG_SOFTMMU */
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if (GUEST_BASE) {
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uint32_t offset = GUEST_BASE;
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int i, rot;
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static inline void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc,
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TCGReg datalo, TCGReg datahi,
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TCGReg addrlo)
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{
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TCGMemOp bswap = opc & MO_BSWAP;
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while (offset) {
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i = ctz32(offset) & ~1;
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rot = ((32 - i) << 7) & 0xf00;
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tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_TMP, addrlo,
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((offset >> i) & 0xff) | rot);
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addrlo = TCG_REG_TMP;
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offset &= ~(0xff << i);
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}
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}
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switch (opc & MO_SSIZE) {
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case MO_UB:
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tcg_out_ld8_12(s, COND_AL, datalo, addrlo, 0);
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@ -1495,32 +1461,32 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
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}
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break;
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case MO_Q:
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if (use_armv6_instructions && !bswap
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&& (datalo & 1) == 0 && datahi == datalo + 1) {
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tcg_out_ldrd_8(s, COND_AL, datalo, addrlo, 0);
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} else if (use_armv6_instructions && bswap
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&& (datahi & 1) == 0 && datalo == datahi + 1) {
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tcg_out_ldrd_8(s, COND_AL, datahi, addrlo, 0);
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} else if (datalo == addrlo) {
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tcg_out_ld32_12(s, COND_AL, datahi, addrlo, bswap ? 0 : 4);
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tcg_out_ld32_12(s, COND_AL, datalo, addrlo, bswap ? 4 : 0);
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} else {
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tcg_out_ld32_12(s, COND_AL, datalo, addrlo, bswap ? 4 : 0);
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tcg_out_ld32_12(s, COND_AL, datahi, addrlo, bswap ? 0 : 4);
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}
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if (bswap) {
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tcg_out_bswap32(s, COND_AL, datalo, datalo);
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tcg_out_bswap32(s, COND_AL, datahi, datahi);
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{
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TCGReg dl = (bswap ? datahi : datalo);
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TCGReg dh = (bswap ? datalo : datahi);
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if (use_armv6_instructions && (dl & 1) == 0 && dh == dl + 1) {
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tcg_out_ldrd_8(s, COND_AL, dl, addrlo, 0);
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} else if (dl == addrlo) {
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tcg_out_ld32_12(s, COND_AL, dh, addrlo, bswap ? 0 : 4);
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tcg_out_ld32_12(s, COND_AL, dl, addrlo, bswap ? 4 : 0);
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} else {
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tcg_out_ld32_12(s, COND_AL, dl, addrlo, bswap ? 4 : 0);
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tcg_out_ld32_12(s, COND_AL, dh, addrlo, bswap ? 0 : 4);
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}
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if (bswap) {
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tcg_out_bswap32(s, COND_AL, dl, dl);
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tcg_out_bswap32(s, COND_AL, dh, dh);
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}
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}
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break;
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}
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#endif
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}
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static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
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static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
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{
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TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));
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TCGMemOp opc, bswap, s_bits;
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TCGMemOp opc;
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#ifdef CONFIG_SOFTMMU
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int mem_index;
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TCGReg addend;
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@ -1532,73 +1498,81 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
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addrlo = *args++;
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addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);
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opc = *args++;
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bswap = opc & MO_BSWAP;
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s_bits = opc & MO_SIZE;
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#ifdef CONFIG_SOFTMMU
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mem_index = *args;
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addend = tcg_out_tlb_read(s, addrlo, addrhi, s_bits, mem_index, 0);
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addend = tcg_out_tlb_read(s, addrlo, addrhi, opc & MO_SIZE, mem_index, 1);
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switch (s_bits) {
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/* This a conditional BL only to load a pointer within this opcode into LR
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for the slow path. We will not be using the value for a tail call. */
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label_ptr = s->code_ptr;
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tcg_out_bl_noaddr(s, COND_NE);
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tcg_out_qemu_ld_index(s, opc, datalo, datahi, addrlo, addend);
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add_qemu_ldst_label(s, 1, opc, datalo, datahi, addrlo, addrhi,
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mem_index, s->code_ptr, label_ptr);
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#else /* !CONFIG_SOFTMMU */
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if (GUEST_BASE) {
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, GUEST_BASE);
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tcg_out_qemu_ld_index(s, opc, datalo, datahi, addrlo, TCG_REG_TMP);
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} else {
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tcg_out_qemu_ld_direct(s, opc, datalo, datahi, addrlo);
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}
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#endif
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}
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static inline void tcg_out_qemu_st_index(TCGContext *s, int cond, TCGMemOp opc,
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TCGReg datalo, TCGReg datahi,
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TCGReg addrlo, TCGReg addend)
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{
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TCGMemOp bswap = opc & MO_BSWAP;
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switch (opc & MO_SIZE) {
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case MO_8:
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tcg_out_st8_r(s, COND_EQ, datalo, addrlo, addend);
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tcg_out_st8_r(s, cond, datalo, addrlo, addend);
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break;
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case MO_16:
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if (bswap) {
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tcg_out_bswap16st(s, COND_EQ, TCG_REG_R0, datalo);
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tcg_out_st16_r(s, COND_EQ, TCG_REG_R0, addrlo, addend);
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tcg_out_bswap16st(s, cond, TCG_REG_R0, datalo);
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tcg_out_st16_r(s, cond, TCG_REG_R0, addrlo, addend);
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} else {
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tcg_out_st16_r(s, COND_EQ, datalo, addrlo, addend);
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tcg_out_st16_r(s, cond, datalo, addrlo, addend);
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}
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break;
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case MO_32:
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default:
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if (bswap) {
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tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, datalo);
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tcg_out_st32_r(s, COND_EQ, TCG_REG_R0, addrlo, addend);
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tcg_out_bswap32(s, cond, TCG_REG_R0, datalo);
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tcg_out_st32_r(s, cond, TCG_REG_R0, addrlo, addend);
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} else {
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tcg_out_st32_r(s, COND_EQ, datalo, addrlo, addend);
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tcg_out_st32_r(s, cond, datalo, addrlo, addend);
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}
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break;
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case MO_64:
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if (bswap) {
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tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, datahi);
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tcg_out_st32_rwb(s, COND_EQ, TCG_REG_R0, addend, addrlo);
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tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, datalo);
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tcg_out_st32_12(s, COND_EQ, TCG_REG_R0, addend, 4);
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tcg_out_bswap32(s, cond, TCG_REG_R0, datahi);
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tcg_out_st32_rwb(s, cond, TCG_REG_R0, addend, addrlo);
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tcg_out_bswap32(s, cond, TCG_REG_R0, datalo);
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tcg_out_st32_12(s, cond, TCG_REG_R0, addend, 4);
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} else if (use_armv6_instructions
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&& (datalo & 1) == 0 && datahi == datalo + 1) {
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tcg_out_strd_r(s, COND_EQ, datalo, addrlo, addend);
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tcg_out_strd_r(s, cond, datalo, addrlo, addend);
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} else {
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tcg_out_st32_rwb(s, COND_EQ, datalo, addend, addrlo);
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tcg_out_st32_12(s, COND_EQ, datahi, addend, 4);
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tcg_out_st32_rwb(s, cond, datalo, addend, addrlo);
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tcg_out_st32_12(s, cond, datahi, addend, 4);
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}
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break;
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}
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}
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/* The conditional call must come last, as we're going to return here. */
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label_ptr = s->code_ptr;
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tcg_out_bl_noaddr(s, COND_NE);
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static inline void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc,
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TCGReg datalo, TCGReg datahi,
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TCGReg addrlo)
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{
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TCGMemOp bswap = opc & MO_BSWAP;
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add_qemu_ldst_label(s, 0, opc, datalo, datahi, addrlo, addrhi,
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mem_index, s->code_ptr, label_ptr);
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#else /* !CONFIG_SOFTMMU */
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if (GUEST_BASE) {
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uint32_t offset = GUEST_BASE;
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int i;
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int rot;
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while (offset) {
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i = ctz32(offset) & ~1;
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rot = ((32 - i) << 7) & 0xf00;
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tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R1, addrlo,
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((offset >> i) & 0xff) | rot);
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addrlo = TCG_REG_R1;
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offset &= ~(0xff << i);
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}
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}
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switch (s_bits) {
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switch (opc & MO_SIZE) {
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case MO_8:
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tcg_out_st8_12(s, COND_AL, datalo, addrlo, 0);
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break;
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@ -1634,6 +1608,44 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
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}
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break;
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}
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}
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static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
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{
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TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));
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TCGMemOp opc;
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#ifdef CONFIG_SOFTMMU
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int mem_index;
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TCGReg addend;
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uint8_t *label_ptr;
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#endif
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datalo = *args++;
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datahi = (is64 ? *args++ : 0);
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addrlo = *args++;
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addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);
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opc = *args++;
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#ifdef CONFIG_SOFTMMU
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mem_index = *args;
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addend = tcg_out_tlb_read(s, addrlo, addrhi, opc & MO_SIZE, mem_index, 0);
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tcg_out_qemu_st_index(s, COND_EQ, opc, datalo, datahi, addrlo, addend);
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/* The conditional call must come last, as we're going to return here. */
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label_ptr = s->code_ptr;
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tcg_out_bl_noaddr(s, COND_NE);
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add_qemu_ldst_label(s, 0, opc, datalo, datahi, addrlo, addrhi,
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mem_index, s->code_ptr, label_ptr);
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#else /* !CONFIG_SOFTMMU */
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if (GUEST_BASE) {
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, GUEST_BASE);
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tcg_out_qemu_st_index(s, COND_AL, opc, datalo,
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datahi, addrlo, TCG_REG_TMP);
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} else {
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tcg_out_qemu_st_direct(s, opc, datalo, datahi, addrlo);
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}
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#endif
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}
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