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Hexagon (target/hexagon) add A6_vminub_RdP
Rdd32,Pe4 = vminub(Rtt32, Rss32) Vector min of bytes Test cases in tests/tcg/hexagon/multi_result.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-21-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -237,6 +237,33 @@
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tcg_temp_free_i64(tmp); \
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} while (0)
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/*
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* Compare each of the 8 unsigned bytes
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* The minimum is placed in each byte of the destination.
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* Each bit of the predicate is set true if the bit from the first operand
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* is greater than the bit from the second operand.
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* r5:4,p1 = vminub(r1:0, r3:2)
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*/
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#define fGEN_TCG_A6_vminub_RdP(SHORTCODE) \
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do { \
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TCGv left = tcg_temp_new(); \
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TCGv right = tcg_temp_new(); \
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TCGv tmp = tcg_temp_new(); \
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tcg_gen_movi_tl(PeV, 0); \
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tcg_gen_movi_i64(RddV, 0); \
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for (int i = 0; i < 8; i++) { \
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gen_get_byte_i64(left, i, RttV, false); \
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gen_get_byte_i64(right, i, RssV, false); \
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tcg_gen_setcond_tl(TCG_COND_GT, tmp, left, right); \
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tcg_gen_deposit_tl(PeV, PeV, tmp, i, 1); \
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tcg_gen_umin_tl(tmp, left, right); \
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gen_set_byte_i64(i, RddV, tmp); \
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} \
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tcg_temp_free(left); \
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tcg_temp_free(right); \
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tcg_temp_free(tmp); \
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} while (0)
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/* Floating point */
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#define fGEN_TCG_F2_conv_sf2df(SHORTCODE) \
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gen_helper_conv_sf2df(RddV, cpu_env, RsV)
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@ -266,6 +266,28 @@ static inline void gen_write_ctrl_reg_pair(DisasContext *ctx, int reg_num,
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}
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}
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static TCGv gen_get_byte_i64(TCGv result, int N, TCGv_i64 src, bool sign)
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{
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TCGv_i64 res64 = tcg_temp_new_i64();
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if (sign) {
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tcg_gen_sextract_i64(res64, src, N * 8, 8);
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} else {
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tcg_gen_extract_i64(res64, src, N * 8, 8);
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}
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tcg_gen_extrl_i64_i32(result, res64);
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tcg_temp_free_i64(res64);
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return result;
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}
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static void gen_set_byte_i64(int N, TCGv_i64 result, TCGv src)
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{
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TCGv_i64 src64 = tcg_temp_new_i64();
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tcg_gen_extu_i32_i64(src64, src);
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tcg_gen_deposit_i64(result, result, src64, N * 8, 8);
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tcg_temp_free_i64(src64);
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}
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static inline void gen_load_locked4u(TCGv dest, TCGv vaddr, int mem_index)
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{
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tcg_gen_qemu_ld32u(dest, vaddr, mem_index);
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@ -1259,6 +1259,16 @@ Q6INSN(A5_ACS,"Rxx32,Pe4=vacsh(Rss32,Rtt32)",ATTRIBS(),
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}
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})
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Q6INSN(A6_vminub_RdP,"Rdd32,Pe4=vminub(Rtt32,Rss32)",ATTRIBS(),
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"Vector minimum of bytes, records minimum and decision vector",
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{
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fHIDE(int i;)
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for (i = 0; i < 8; i++) {
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fSETBIT(i, PeV, (fGETUBYTE(i,RttV) > fGETUBYTE(i,RssV)));
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fSETBYTE(i,RddV,fMIN(fGETUBYTE(i,RttV),fGETUBYTE(i,RssV)));
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}
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})
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/**********************************************/
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/* Vector Min/Max */
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/**********************************************/
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@ -1018,6 +1018,7 @@ MPY_ENC(M7_dcmpyiwc_acc, "1010","xxxxx","1","0","1","0","10")
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MPY_ENC(A5_ACS, "1010","xxxxx","0","1","0","1","ee")
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MPY_ENC(A6_vminub_RdP, "1010","ddddd","0","1","1","1","ee")
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/*
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*/
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@ -70,6 +70,21 @@ static long long vacsh(long long Rxx, long long Rss, long long Rtt,
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return result;
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}
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static long long vminub(long long Rtt, long long Rss,
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int *pred_result)
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{
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long long result;
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int predval;
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asm volatile("%0,p0 = vminub(%2, %3)\n\t"
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"%1 = p0\n\t"
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: "=r"(result), "=r"(predval)
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: "r"(Rtt), "r"(Rss)
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: "p0");
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*pred_result = predval;
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return result;
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}
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int err;
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static void check_ll(long long val, long long expect)
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@ -155,11 +170,30 @@ static void test_vacsh()
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check(ovf_result, 0);
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}
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static void test_vminub()
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{
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long long res64;
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int pred_result;
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res64 = vminub(0x0807060504030201LL,
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0x0102030405060708LL,
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&pred_result);
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check_ll(res64, 0x0102030404030201LL);
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check_p(pred_result, 0xf0);
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res64 = vminub(0x0802060405030701LL,
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0x0107030504060208LL,
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&pred_result);
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check_ll(res64, 0x0102030404030201LL);
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check_p(pred_result, 0xaa);
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}
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int main()
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{
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test_sfrecipa();
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test_sfinvsqrta();
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test_vacsh();
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test_vminub();
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puts(err ? "FAIL" : "PASS");
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return err;
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