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m25p80: Add support for BRRD/BRWR and BULK_ERASE (0x60)
Add support for the bank address register access commands (BRRD/BRWR) and the BULK_ERASE (0x60) command. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Acked-by: Marcin Krzemiński <mar.krzeminski@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20171126231634.9531-4-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -331,7 +331,10 @@ typedef enum {
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WRDI = 0x4,
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RDSR = 0x5,
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WREN = 0x6,
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BRRD = 0x16,
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BRWR = 0x17,
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JEDEC_READ = 0x9f,
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BULK_ERASE_60 = 0x60,
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BULK_ERASE = 0xc7,
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READ_FSR = 0x70,
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RDCR = 0x15,
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@ -704,6 +707,7 @@ static void complete_collecting_data(Flash *s)
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s->write_enable = false;
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}
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break;
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case BRWR:
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case EXTEND_ADDR_WRITE:
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s->ear = s->data[0];
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break;
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@ -1050,6 +1054,7 @@ static void decode_new_cmd(Flash *s, uint32_t value)
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s->state = STATE_READING_DATA;
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break;
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case BULK_ERASE_60:
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case BULK_ERASE:
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if (s->write_enable) {
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DB_PRINT_L(0, "chip erase\n");
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@ -1067,12 +1072,14 @@ static void decode_new_cmd(Flash *s, uint32_t value)
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case EX_4BYTE_ADDR:
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s->four_bytes_address_mode = false;
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break;
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case BRRD:
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case EXTEND_ADDR_READ:
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s->data[0] = s->ear;
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s->pos = 0;
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s->len = 1;
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s->state = STATE_READING_DATA;
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break;
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case BRWR:
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case EXTEND_ADDR_WRITE:
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if (s->write_enable) {
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s->needed_bytes = 1;
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