mirror of
https://github.com/xemu-project/xemu.git
synced 2025-02-01 17:53:20 +00:00
net/dp8393x: QOM'ify
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
This commit is contained in:
parent
3df5de64f0
commit
104655a5c8
@ -273,8 +273,16 @@ static void mips_jazz_init(MachineState *machine,
|
|||||||
if (!nd->model)
|
if (!nd->model)
|
||||||
nd->model = g_strdup("dp83932");
|
nd->model = g_strdup("dp83932");
|
||||||
if (strcmp(nd->model, "dp83932") == 0) {
|
if (strcmp(nd->model, "dp83932") == 0) {
|
||||||
dp83932_init(nd, 0x80001000, 2, get_system_memory(),
|
qemu_check_nic_model(nd, "dp83932");
|
||||||
qdev_get_gpio_in(rc4030, 4), rc4030_dma_mr);
|
|
||||||
|
dev = qdev_create(NULL, "dp8393x");
|
||||||
|
qdev_set_nic_properties(dev, nd);
|
||||||
|
qdev_prop_set_uint8(dev, "it_shift", 2);
|
||||||
|
qdev_prop_set_ptr(dev, "dma_mr", rc4030_dma_mr);
|
||||||
|
qdev_init_nofail(dev);
|
||||||
|
sysbus = SYS_BUS_DEVICE(dev);
|
||||||
|
sysbus_mmio_map(sysbus, 0, 0x80001000);
|
||||||
|
sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 4));
|
||||||
break;
|
break;
|
||||||
} else if (is_help_option(nd->model)) {
|
} else if (is_help_option(nd->model)) {
|
||||||
fprintf(stderr, "qemu: Supported NICs: dp83932\n");
|
fprintf(stderr, "qemu: Supported NICs: dp83932\n");
|
||||||
|
@ -17,10 +17,10 @@
|
|||||||
* with this program; if not, see <http://www.gnu.org/licenses/>.
|
* with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "hw/hw.h"
|
#include "hw/sysbus.h"
|
||||||
#include "qemu/timer.h"
|
#include "hw/devices.h"
|
||||||
#include "net/net.h"
|
#include "net/net.h"
|
||||||
#include "hw/mips/mips.h"
|
#include "qemu/timer.h"
|
||||||
#include <zlib.h>
|
#include <zlib.h>
|
||||||
|
|
||||||
//#define DEBUG_SONIC
|
//#define DEBUG_SONIC
|
||||||
@ -139,9 +139,14 @@ do { printf("sonic ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
|
|||||||
#define SONIC_ISR_PINT 0x0800
|
#define SONIC_ISR_PINT 0x0800
|
||||||
#define SONIC_ISR_LCD 0x1000
|
#define SONIC_ISR_LCD 0x1000
|
||||||
|
|
||||||
|
#define TYPE_DP8393X "dp8393x"
|
||||||
|
#define DP8393X(obj) OBJECT_CHECK(dp8393xState, (obj), TYPE_DP8393X)
|
||||||
|
|
||||||
typedef struct dp8393xState {
|
typedef struct dp8393xState {
|
||||||
|
SysBusDevice parent_obj;
|
||||||
|
|
||||||
/* Hardware */
|
/* Hardware */
|
||||||
int it_shift;
|
uint8_t it_shift;
|
||||||
qemu_irq irq;
|
qemu_irq irq;
|
||||||
#ifdef DEBUG_SONIC
|
#ifdef DEBUG_SONIC
|
||||||
int irq_level;
|
int irq_level;
|
||||||
@ -150,7 +155,6 @@ typedef struct dp8393xState {
|
|||||||
int64_t wt_last_update;
|
int64_t wt_last_update;
|
||||||
NICConf conf;
|
NICConf conf;
|
||||||
NICState *nic;
|
NICState *nic;
|
||||||
MemoryRegion *address_space;
|
|
||||||
MemoryRegion mmio;
|
MemoryRegion mmio;
|
||||||
|
|
||||||
/* Registers */
|
/* Registers */
|
||||||
@ -162,6 +166,7 @@ typedef struct dp8393xState {
|
|||||||
int loopback_packet;
|
int loopback_packet;
|
||||||
|
|
||||||
/* Memory access */
|
/* Memory access */
|
||||||
|
void *dma_mr;
|
||||||
AddressSpace as;
|
AddressSpace as;
|
||||||
} dp8393xState;
|
} dp8393xState;
|
||||||
|
|
||||||
@ -774,9 +779,9 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
|
|||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void dp8393x_reset(void *opaque)
|
static void dp8393x_reset(DeviceState *dev)
|
||||||
{
|
{
|
||||||
dp8393xState *s = opaque;
|
dp8393xState *s = DP8393X(dev);
|
||||||
timer_del(s->watchdog);
|
timer_del(s->watchdog);
|
||||||
|
|
||||||
s->regs[SONIC_CR] = SONIC_CR_RST | SONIC_CR_STP | SONIC_CR_RXDIS;
|
s->regs[SONIC_CR] = SONIC_CR_RST | SONIC_CR_STP | SONIC_CR_RXDIS;
|
||||||
@ -805,33 +810,59 @@ static NetClientInfo net_dp83932_info = {
|
|||||||
.receive = dp8393x_receive,
|
.receive = dp8393x_receive,
|
||||||
};
|
};
|
||||||
|
|
||||||
void dp83932_init(NICInfo *nd, hwaddr base, int it_shift,
|
static void dp8393x_instance_init(Object *obj)
|
||||||
MemoryRegion *address_space,
|
|
||||||
qemu_irq irq, MemoryRegion *dma_mr)
|
|
||||||
{
|
{
|
||||||
dp8393xState *s;
|
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
|
||||||
|
dp8393xState *s = DP8393X(obj);
|
||||||
|
|
||||||
qemu_check_nic_model(nd, "dp83932");
|
sysbus_init_mmio(sbd, &s->mmio);
|
||||||
|
sysbus_init_irq(sbd, &s->irq);
|
||||||
|
}
|
||||||
|
|
||||||
s = g_malloc0(sizeof(dp8393xState));
|
static void dp8393x_realize(DeviceState *dev, Error **errp)
|
||||||
|
{
|
||||||
|
dp8393xState *s = DP8393X(dev);
|
||||||
|
|
||||||
|
address_space_init(&s->as, s->dma_mr, "dp8393x");
|
||||||
|
memory_region_init_io(&s->mmio, OBJECT(dev), &dp8393x_ops, s,
|
||||||
|
"dp8393x-regs", 0x40 << s->it_shift);
|
||||||
|
|
||||||
|
s->nic = qemu_new_nic(&net_dp83932_info, &s->conf,
|
||||||
|
object_get_typename(OBJECT(dev)), dev->id, s);
|
||||||
|
qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
|
||||||
|
|
||||||
s->address_space = address_space;
|
|
||||||
address_space_init(&s->as, dma_mr, "dp8393x-dma");
|
|
||||||
s->it_shift = it_shift;
|
|
||||||
s->irq = irq;
|
|
||||||
s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s);
|
s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s);
|
||||||
s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
|
s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
|
||||||
|
|
||||||
s->conf.macaddr = nd->macaddr;
|
|
||||||
s->conf.peers.ncs[0] = nd->netdev;
|
|
||||||
|
|
||||||
s->nic = qemu_new_nic(&net_dp83932_info, &s->conf, nd->model, nd->name, s);
|
|
||||||
|
|
||||||
qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
|
|
||||||
qemu_register_reset(dp8393x_reset, s);
|
|
||||||
dp8393x_reset(s);
|
|
||||||
|
|
||||||
memory_region_init_io(&s->mmio, NULL, &dp8393x_ops, s,
|
|
||||||
"dp8393x", 0x40 << it_shift);
|
|
||||||
memory_region_add_subregion(address_space, base, &s->mmio);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static Property dp8393x_properties[] = {
|
||||||
|
DEFINE_NIC_PROPERTIES(dp8393xState, conf),
|
||||||
|
DEFINE_PROP_PTR("dma_mr", dp8393xState, dma_mr),
|
||||||
|
DEFINE_PROP_UINT8("it_shift", dp8393xState, it_shift, 0),
|
||||||
|
DEFINE_PROP_END_OF_LIST(),
|
||||||
|
};
|
||||||
|
|
||||||
|
static void dp8393x_class_init(ObjectClass *klass, void *data)
|
||||||
|
{
|
||||||
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
||||||
|
|
||||||
|
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
|
||||||
|
dc->realize = dp8393x_realize;
|
||||||
|
dc->reset = dp8393x_reset;
|
||||||
|
dc->props = dp8393x_properties;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const TypeInfo dp8393x_info = {
|
||||||
|
.name = TYPE_DP8393X,
|
||||||
|
.parent = TYPE_SYS_BUS_DEVICE,
|
||||||
|
.instance_size = sizeof(dp8393xState),
|
||||||
|
.instance_init = dp8393x_instance_init,
|
||||||
|
.class_init = dp8393x_class_init,
|
||||||
|
};
|
||||||
|
|
||||||
|
static void dp8393x_register_types(void)
|
||||||
|
{
|
||||||
|
type_register_static(&dp8393x_info);
|
||||||
|
}
|
||||||
|
|
||||||
|
type_init(dp8393x_register_types)
|
||||||
|
@ -20,9 +20,4 @@ void rc4030_dma_write(void *dma, uint8_t *buf, int len);
|
|||||||
|
|
||||||
DeviceState *rc4030_init(rc4030_dma **dmas, MemoryRegion **dma_mr);
|
DeviceState *rc4030_init(rc4030_dma **dmas, MemoryRegion **dma_mr);
|
||||||
|
|
||||||
/* dp8393x.c */
|
|
||||||
void dp83932_init(NICInfo *nd, hwaddr base, int it_shift,
|
|
||||||
MemoryRegion *address_space,
|
|
||||||
qemu_irq irq, MemoryRegion *dma_mr);
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
x
Reference in New Issue
Block a user