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ppc/pnv: Improve trigger data definition

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The trigger data is used for both triggers of a HW source interrupts,
PHB, PSI, and triggers for rerouting interrupts between interrupt
controllers.

When an interrupt is rerouted, the trigger data follows an "END
trigger" format. In that case, the remote IC needs EAS containing an
END index to perform a lookup of an END.

An END trigger, bit0 of word0 set to '1', is defined as :

             |0123|4567|0123|4567|0123|4567|0123|4567|
    W0 E=1   |1P--|BLOC|          END IDX            |
    W1 E=1   |M   |           END DATA               |

An EAS is defined as :

             |0123|4567|0123|4567|0123|4567|0123|4567|
    W0       |V---|BLOC|          END IDX            |
    W1       |M   |          END DATA                |

The END trigger adds an extra 'PQ' bit, bit1 of word0 set to '1',
signaling that the PQ bits have been checked. That bit is unused in
the initial EAS definition.

When a HW device performs the trigger, the trigger data follows an
"EAS trigger" format because the trigger data in that case contains an
EAS index which the IC needs to look for.

An EAS trigger, bit0 of word0 set to '0', is defined as :

             |0123|4567|0123|4567|0123|4567|0123|4567|
    W0 E=0   |0P--|---- ---- ---- ---- ---- ---- ----|
    W1 E=0   |BLOC|            EAS INDEX             |

There is also a 'PQ' bit, bit1 of word0 to '1', signaling that the
PQ bits have been checked.

Introduce these new trigger bits and rename the XIVE_SRCNO macros in
XIVE_EAS to reflect better the nature of the data.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20191007084102.29776-2-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2019-10-07 10:40:54 +02:00 committed by David Gibson
parent 8d745875c2
commit 106695ab12
3 changed files with 41 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
hw/intc/pnv_xive.c
View File

@ -385,7 +385,7 @@ static int pnv_xive_get_eas(XiveRouter *xrtr, uint8_t blk, uint32_t idx,
PnvXive *xive = PNV_XIVE(xrtr);
if (pnv_xive_get_ic(blk) != xive) {
xive_error(xive, "VST: EAS %x is remote !?", XIVE_SRCNO(blk, idx));
xive_error(xive, "VST: EAS %x is remote !?", XIVE_EAS(blk, idx));
return -1;
}
@ -431,7 +431,7 @@ static void pnv_xive_notify(XiveNotifier *xn, uint32_t srcno)
PnvXive *xive = PNV_XIVE(xn);
uint8_t blk = xive->chip->chip_id;
xive_router_notify(xn, XIVE_SRCNO(blk, srcno));
xive_router_notify(xn, XIVE_EAS(blk, srcno));
}
/*
@ -1225,12 +1225,24 @@ static const MemoryRegionOps pnv_xive_ic_reg_ops = {
static void pnv_xive_ic_hw_trigger(PnvXive *xive, hwaddr addr, uint64_t val)
{
uint8_t blk;
uint32_t idx;
if (val & XIVE_TRIGGER_END) {
xive_error(xive, "IC: END trigger at @0x%"HWADDR_PRIx" data 0x%"PRIx64,
addr, val);
return;
}
/*
* Forward the source event notification directly to the Router.
* The source interrupt number should already be correctly encoded
* with the chip block id by the sending device (PHB, PSI).
*/
xive_router_notify(XIVE_NOTIFIER(xive), val);
blk = XIVE_EAS_BLOCK(val);
idx = XIVE_EAS_INDEX(val);
xive_router_notify(XIVE_NOTIFIER(xive), XIVE_EAS(blk, idx));
}
static void pnv_xive_ic_notify_write(void *opaque, hwaddr addr, uint64_t val,
@ -1566,7 +1578,7 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon)
{
XiveRouter *xrtr = XIVE_ROUTER(xive);
uint8_t blk = xive->chip->chip_id;
uint32_t srcno0 = XIVE_SRCNO(blk, 0);
uint32_t srcno0 = XIVE_EAS(blk, 0);
uint32_t nr_ipis = pnv_xive_nr_ipis(xive);
uint32_t nr_ends = pnv_xive_nr_ends(xive);
XiveEAS eas;

4
hw/intc/xive.c
View File

@ -1658,8 +1658,8 @@ do_escalation:
void xive_router_notify(XiveNotifier *xn, uint32_t lisn)
{
XiveRouter *xrtr = XIVE_ROUTER(xn);
uint8_t eas_blk = XIVE_SRCNO_BLOCK(lisn);
uint32_t eas_idx = XIVE_SRCNO_INDEX(lisn);
uint8_t eas_blk = XIVE_EAS_BLOCK(lisn);
uint32_t eas_idx = XIVE_EAS_INDEX(lisn);
XiveEAS eas;
/* EAS cache lookup */

26
include/hw/ppc/xive_regs.h
View File

@ -22,9 +22,29 @@
/*
* Interrupt source number encoding on PowerBUS
*/
#define XIVE_SRCNO_BLOCK(srcno) (((srcno) >> 28) & 0xf)
#define XIVE_SRCNO_INDEX(srcno) ((srcno) & 0x0fffffff)
#define XIVE_SRCNO(blk, idx) ((uint32_t)(blk) << 28 | (idx))
/*
* Trigger data definition
*
* The trigger definition is used for triggers both for HW source
* interrupts (PHB, PSI), as well as for rerouting interrupts between
* Interrupt Controller.
*
* HW source controllers set bit0 of word0 to ‘0’ as they provide EAS
* information (EAS block + EAS index) in the 8 byte data and not END
* information, which is use for rerouting interrupts.
*
* bit1 of word0 to ‘1’ signals that the state bit check has been
* performed.
*/
#define XIVE_TRIGGER_END PPC_BIT(0)
#define XIVE_TRIGGER_PQ PPC_BIT(1)
/*
* QEMU macros to manipulate the trigger payload in native endian
*/
#define XIVE_EAS_BLOCK(n) (((n) >> 28) & 0xf)
#define XIVE_EAS_INDEX(n) ((n) & 0x0fffffff)
#define XIVE_EAS(blk, idx) ((uint32_t)(blk) << 28 | (idx))
#define TM_SHIFT 16