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target/sh4: Implement fsrra
Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-27-rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -37,6 +37,7 @@ DEF_HELPER_FLAGS_3(fsub_FT, TCG_CALL_NO_WG, f32, env, f32, f32)
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DEF_HELPER_FLAGS_3(fsub_DT, TCG_CALL_NO_WG, f64, env, f64, f64)
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DEF_HELPER_FLAGS_2(fsqrt_FT, TCG_CALL_NO_WG, f32, env, f32)
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DEF_HELPER_FLAGS_2(fsqrt_DT, TCG_CALL_NO_WG, f64, env, f64)
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DEF_HELPER_FLAGS_2(fsrra_FT, TCG_CALL_NO_WG, f32, env, f32)
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DEF_HELPER_FLAGS_2(ftrc_FT, TCG_CALL_NO_WG, i32, env, f32)
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DEF_HELPER_FLAGS_2(ftrc_DT, TCG_CALL_NO_WG, i32, env, f64)
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DEF_HELPER_3(fipr, void, env, i32, i32)
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@ -406,6 +406,22 @@ float64 helper_fsqrt_DT(CPUSH4State *env, float64 t0)
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return t0;
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}
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float32 helper_fsrra_FT(CPUSH4State *env, float32 t0)
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{
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set_float_exception_flags(0, &env->fp_status);
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/* "Approximate" 1/sqrt(x) via actual computation. */
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t0 = float32_sqrt(t0, &env->fp_status);
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t0 = float32_div(float32_one, t0, &env->fp_status);
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/* Since this is supposed to be an approximation, an imprecision
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exception is required. One supposes this also follows the usual
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IEEE rule that other exceptions take precidence. */
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if (get_float_exception_flags(&env->fp_status) == 0) {
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set_float_exception_flags(float_flag_inexact, &env->fp_status);
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}
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update_fpscr(env, GETPC());
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return t0;
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}
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float32 helper_fsub_FT(CPUSH4State *env, float32 t0, float32 t1)
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{
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set_float_exception_flags(0, &env->fp_status);
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@ -1731,6 +1731,8 @@ static void _decode_opc(DisasContext * ctx)
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return;
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case 0xf07d: /* fsrra FRn */
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CHECK_FPU_ENABLED
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CHECK_FPSCR_PR_0
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gen_helper_fsrra_FT(FREG(B11_8), cpu_env, FREG(B11_8));
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break;
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case 0xf08d: /* fldi0 FRn - FPSCR: R[PR] */
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CHECK_FPU_ENABLED
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