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target/ppc: Optimize emulation of vclzw instruction

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Optimize Altivec instruction vclzw (Vector Count Leading Zeros Word).
This instruction counts the number of leading zeros of each word element
in source register and places result in the appropriate word element of
destination register.

Counting is to be performed in four iterations of for loop(one for each
word elemnt of source register vB). Every iteration consists of loading
appropriate word element from source register, counting leading zeros
with tcg_gen_clzi_i32, and saving the result in appropriate word element
of destination register.

Signed-off-by: Stefan Brankovic <stefan.brankovic@rt-rk.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1563200574-11098-7-git-send-email-stefan.brankovic@rt-rk.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Stefan Brankovic 2019-07-15 16:22:52 +02:00 committed by David Gibson
parent b8313f0d91
commit 1872588ede
3 changed files with 27 additions and 5 deletions
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1
target/ppc/helper.h
View File

@ -310,7 +310,6 @@ DEF_HELPER_4(vctsxs, void, env, avr, avr, i32)
DEF_HELPER_2(vclzb, void, avr, avr)
DEF_HELPER_2(vclzh, void, avr, avr)
DEF_HELPER_2(vclzw, void, avr, avr)
DEF_HELPER_2(vctzb, void, avr, avr)
DEF_HELPER_2(vctzh, void, avr, avr)
DEF_HELPER_2(vctzw, void, avr, avr)

3
target/ppc/int_helper.c
View File

@ -1819,15 +1819,12 @@ VUPK(lsw, s64, s32, UPKLO)
#define clzb(v) ((v) ? clz32((uint32_t)(v) << 24) : 8)
#define clzh(v) ((v) ? clz32((uint32_t)(v) << 16) : 16)
#define clzw(v) clz32((v))
VGENERIC_DO(clzb, u8)
VGENERIC_DO(clzh, u16)
VGENERIC_DO(clzw, u32)
#undef clzb
#undef clzh
#undef clzw
#define ctzb(v) ((v) ? ctz32(v) : 8)
#define ctzh(v) ((v) ? ctz32(v) : 16)

28
target/ppc/translate/vmx-impl.inc.c
View File

@ -742,6 +742,32 @@ static void trans_vgbbd(DisasContext *ctx)
tcg_temp_free_i64(avr[1]);
}
/*
* vclzw VRT,VRB - Vector Count Leading Zeros Word
*
* Counting the number of leading zero bits of each word element in source
* register and placing result in appropriate word element of destination
* register.
*/
static void trans_vclzw(DisasContext *ctx)
{
int VT = rD(ctx->opcode);
int VB = rB(ctx->opcode);
TCGv_i32 tmp = tcg_temp_new_i32();
int i;
/* Perform count for every word element using tcg_gen_clzi_i32. */
for (i = 0; i < 4; i++) {
tcg_gen_ld_i32(tmp, cpu_env,
offsetof(CPUPPCState, vsr[32 + VB].u64[0]) + i * 4);
tcg_gen_clzi_i32(tmp, tmp, 32);
tcg_gen_st_i32(tmp, cpu_env,
offsetof(CPUPPCState, vsr[32 + VT].u64[0]) + i * 4);
}
tcg_temp_free_i32(tmp);
}
/*
* vclzd VRT,VRB - Vector Count Leading Zeros Doubleword
*
@ -1283,7 +1309,7 @@ GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23)
GEN_VXFORM_NOA(vclzb, 1, 28)
GEN_VXFORM_NOA(vclzh, 1, 29)
GEN_VXFORM_NOA(vclzw, 1, 30)
GEN_VXFORM_TRANS(vclzw, 1, 30)
GEN_VXFORM_TRANS(vclzd, 1, 31)
GEN_VXFORM_NOA_2(vnegw, 1, 24, 6)
GEN_VXFORM_NOA_2(vnegd, 1, 24, 7)