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nv2a: Store zclamp config to registers

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This commit is contained in:
Matt Borgerson 2022-06-14 16:48:04 -07:00 committed by mborgerson
parent 875c0659d6
commit 191f927517
4 changed files with 29 additions and 11 deletions
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2
hw/xbox/nv2a/nv2a_int.h
View File

@ -329,8 +329,6 @@ typedef struct PGRAPHState {
unsigned int primitive_mode;
bool depth_clamp_enable;
bool enable_vertex_program_write;
uint32_t program_data[NV2A_MAX_TRANSFORM_PROGRAM_LENGTH][VSH_TOKEN_SIZE];

11
hw/xbox/nv2a/nv2a_regs.h
View File

@ -602,6 +602,10 @@
#define NV_PGRAPH_WINDOWCLIPY5 0x00001A78
#define NV_PGRAPH_WINDOWCLIPY6 0x00001A7C
#define NV_PGRAPH_WINDOWCLIPY7 0x00001A80
#define NV_PGRAPH_ZCOMPRESSOCCLUDE 0x00001A84
# define NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN (1 << 4)
# define NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN_CULL 0
# define NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN_CLAMP 1
#define NV_PGRAPH_ZSTENCILCLEARVALUE 0x00001A88
#define NV_PGRAPH_ZCLIPMIN 0x00001A90
#define NV_PGRAPH_ZOFFSETBIAS 0x00001AA4
@ -1205,9 +1209,10 @@
# define NV097_SET_TEXTURE_SET_BUMP_ENV_OFFSET 0x00001B3C
# define NV097_SET_SEMAPHORE_OFFSET 0x00001D6C
# define NV097_BACK_END_WRITE_SEMAPHORE_RELEASE 0x00001D70
# define NV097_SET_DEPTH_CLAMP_CONTROL 0x00001D78
# define NV097_SET_DEPTH_CLAMP_CONTROL_CLAMP 0x000000F0
# define NV097_SET_DEPTH_CLAMP_CONTROL_CLAMP_ENABLE (1 << 4)
# define NV097_SET_ZMIN_MAX_CONTROL 0x00001D78
# define NV097_SET_ZMIN_MAX_CONTROL_ZCLAMP_EN 0x000000F0
# define NV097_SET_ZMIN_MAX_CONTROL_ZCLAMP_EN_CULL 0
# define NV097_SET_ZMIN_MAX_CONTROL_ZCLAMP_EN_CLAMP 1
# define NV097_SET_ZSTENCIL_CLEAR_VALUE 0x00001D8C
# define NV097_SET_COLOR_CLEAR_VALUE 0x00001D90
# define NV097_CLEAR_SURFACE 0x00001D94

25
hw/xbox/nv2a/pgraph.c
View File

@ -2932,7 +2932,9 @@ DEF_METHOD(NV097, SET_BEGIN_END)
glDisable(GL_DEPTH_TEST);
}
if (pg->depth_clamp_enable) {
if (GET_MASK(pg->regs[NV_PGRAPH_ZCOMPRESSOCCLUDE],
NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN) ==
NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN_CLAMP) {
glEnable(GL_DEPTH_CLAMP);
} else {
glDisable(GL_DEPTH_CLAMP);
@ -3327,10 +3329,24 @@ DEF_METHOD(NV097, BACK_END_WRITE_SEMAPHORE_RELEASE)
//qemu_mutex_unlock_iothread();
}
DEF_METHOD(NV097, SET_DEPTH_CLAMP_CONTROL)
DEF_METHOD(NV097, SET_ZMIN_MAX_CONTROL)
{
pg->depth_clamp_enable =
parameter & NV097_SET_DEPTH_CLAMP_CONTROL_CLAMP_ENABLE;
switch (GET_MASK(parameter, NV097_SET_ZMIN_MAX_CONTROL_ZCLAMP_EN)) {
case NV097_SET_ZMIN_MAX_CONTROL_ZCLAMP_EN_CULL:
SET_MASK(pg->regs[NV_PGRAPH_ZCOMPRESSOCCLUDE],
NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN,
NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN_CULL);
break;
case NV097_SET_ZMIN_MAX_CONTROL_ZCLAMP_EN_CLAMP:
SET_MASK(pg->regs[NV_PGRAPH_ZCOMPRESSOCCLUDE],
NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN,
NV_PGRAPH_ZCOMPRESSOCCLUDE_ZCLAMP_EN_CLAMP);
break;
default:
/* FIXME: Should raise NV_PGRAPH_NSOURCE_DATA_ERROR_PENDING */
assert(!"Invalid zclamp value");
break;
}
}
DEF_METHOD(NV097, SET_ZSTENCIL_CLEAR_VALUE)
@ -3878,7 +3894,6 @@ void pgraph_init(NV2AState *d)
pg->shader_cache = g_hash_table_new(shader_hash, shader_equal);
pg->depth_clamp_enable = false;
pg->material_alpha = 0.0f;
for (i=0; i<NV2A_VERTEXSHADER_ATTRIBUTES; i++) {

2
hw/xbox/nv2a/pgraph_methods.h
View File

@ -167,7 +167,7 @@ DEF_METHOD_RANGE(NV097, SET_VERTEX_DATA4UB, 16)
DEF_METHOD_RANGE(NV097, SET_VERTEX_DATA4S_M, 32)
DEF_METHOD(NV097, SET_SEMAPHORE_OFFSET)
DEF_METHOD(NV097, BACK_END_WRITE_SEMAPHORE_RELEASE)
DEF_METHOD(NV097, SET_DEPTH_CLAMP_CONTROL)
DEF_METHOD(NV097, SET_ZMIN_MAX_CONTROL)
DEF_METHOD(NV097, SET_ZSTENCIL_CLEAR_VALUE)
DEF_METHOD(NV097, SET_COLOR_CLEAR_VALUE)
DEF_METHOD(NV097, CLEAR_SURFACE)