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acpi: cpuhp: spec: clarify 'CPU selector' register usage and endianness
* Move reserved registers to the top of the section, so reader would be aware of effects when reading registers description. * State registers endianness explicitly at the beginning of the section * Describe registers behavior in case of 'CPU selector' register contains value that doesn't point to a possible CPU. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <1575896942-331151-5-git-send-email-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -30,6 +30,18 @@ Register block base address:
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Register block size:
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ACPI_CPU_HOTPLUG_REG_LEN = 12
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All accesses to registers described below, imply little-endian byte order.
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Reserved resisters behavior:
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- write accesses are ignored
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- read accesses return all bits set to 0.
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The last stored value in 'CPU selector' must refer to a possible CPU, otherwise
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- reads from any register return 0
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- writes to any other register are ignored until valid value is stored into it
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On QEMU start, 'CPU selector' is initialized to a valid value, on reset it
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keeps the current value.
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read access:
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offset:
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[0x0-0x3] reserved
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@ -86,9 +98,3 @@ write access:
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ACPI_DEVICE_OST QMP event from QEMU to external applications
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with current values of OST event and status registers.
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other values: reserved
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Selecting CPU device beyond possible range has no effect on platform:
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- write accesses to CPU hot-plug registers not documented above are
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ignored
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- read accesses to CPU hot-plug registers not documented above return
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all bits set to 0.
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