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s390x/tcg: Simplify vop64_2() handling
Let's rework our macros and simplify. We still need helper functions in most cases due to the different parameters types. Next, we'll only have 32/128bit variants for vfi and vfsq, so special case the others. Note that for vfsq, the XxC and erm passed in the simd_data() will never be set, resulting in the same behavior. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-5-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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863b9507a6
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21bd6ea2b3
@ -262,16 +262,11 @@ DEF_HELPER_FLAGS_5(gvec_vfche64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i3
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DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfche64s_cc, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcdg64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcdlg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcdlg64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcgd64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vclgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vclgd64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfd64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfi64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfi64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfll32s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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@ -282,7 +277,6 @@ DEF_HELPER_FLAGS_6(gvec_vfma64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, en
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DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfms64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfsq64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfs64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_4(gvec_vftci64, void, ptr, cptr, env, i32)
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DEF_HELPER_4(gvec_vftci64s, void, ptr, cptr, env, i32)
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@ -2558,19 +2558,19 @@ static DisasJumpType op_vcdg(DisasContext *s, DisasOps *o)
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switch (s->fields.op2) {
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case 0xc3:
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fn = se ? gen_helper_gvec_vcdg64s : gen_helper_gvec_vcdg64;
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fn = gen_helper_gvec_vcdg64;
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break;
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case 0xc1:
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fn = se ? gen_helper_gvec_vcdlg64s : gen_helper_gvec_vcdlg64;
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fn = gen_helper_gvec_vcdlg64;
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break;
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case 0xc2:
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fn = se ? gen_helper_gvec_vcgd64s : gen_helper_gvec_vcgd64;
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fn = gen_helper_gvec_vcgd64;
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break;
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case 0xc0:
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fn = se ? gen_helper_gvec_vclgd64s : gen_helper_gvec_vclgd64;
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fn = gen_helper_gvec_vclgd64;
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break;
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case 0xc7:
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fn = se ? gen_helper_gvec_vfi64s : gen_helper_gvec_vfi64;
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fn = gen_helper_gvec_vfi64;
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break;
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case 0xc5:
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fn = se ? gen_helper_gvec_vflr64s : gen_helper_gvec_vflr64;
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@ -2681,18 +2681,14 @@ static DisasJumpType op_vfsq(DisasContext *s, DisasOps *o)
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{
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const uint8_t fpf = get_field(s, m3);
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const uint8_t m4 = get_field(s, m4);
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gen_helper_gvec_2_ptr *fn = gen_helper_gvec_vfsq64;
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if (fpf != FPF_LONG || extract32(m4, 0, 3)) {
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gen_program_exception(s, PGM_SPECIFICATION);
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return DISAS_NORETURN;
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}
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if (extract32(m4, 3, 1)) {
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fn = gen_helper_gvec_vfsq64s;
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}
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gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env,
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0, fn);
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gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, m4,
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gen_helper_gvec_vfsq64);
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return DISAS_NEXT;
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}
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@ -88,7 +88,7 @@ static void s390_vec_write_float64(S390Vector *v, uint8_t enr, float64 data)
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return s390_vec_write_element64(v, enr, data);
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}
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typedef uint64_t (*vop64_2_fn)(uint64_t a, float_status *s);
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typedef float64 (*vop64_2_fn)(float64 a, float_status *s);
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static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
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bool s, bool XxC, uint8_t erm, vop64_2_fn fn,
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uintptr_t retaddr)
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@ -99,9 +99,9 @@ static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
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old_mode = s390_swap_bfp_rounding_mode(env, erm);
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for (i = 0; i < 2; i++) {
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const uint64_t a = s390_vec_read_element64(v2, i);
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const float64 a = s390_vec_read_float64(v2, i);
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s390_vec_write_element64(&tmp, i, fn(a, &env->fpu_status));
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s390_vec_write_float64(&tmp, i, fn(a, &env->fpu_status));
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vxc = check_ieee_exc(env, i, XxC, &vec_exc);
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if (s || vxc) {
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break;
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@ -112,6 +112,54 @@ static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
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*v1 = tmp;
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}
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static float64 vcdg64(float64 a, float_status *s)
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{
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return int64_to_float64(a, s);
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}
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static float64 vcdlg64(float64 a, float_status *s)
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{
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return uint64_to_float64(a, s);
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}
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static float64 vcgd64(float64 a, float_status *s)
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{
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const float64 tmp = float64_to_int64(a, s);
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return float64_is_any_nan(a) ? INT64_MIN : tmp;
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}
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static float64 vclgd64(float64 a, float_status *s)
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{
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const float64 tmp = float64_to_uint64(a, s);
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return float64_is_any_nan(a) ? 0 : tmp;
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}
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#define DEF_GVEC_VOP2_FN(NAME, FN, BITS) \
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void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, CPUS390XState *env, \
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uint32_t desc) \
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{ \
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const uint8_t erm = extract32(simd_data(desc), 4, 4); \
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const bool se = extract32(simd_data(desc), 3, 1); \
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const bool XxC = extract32(simd_data(desc), 2, 1); \
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\
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vop##BITS##_2(v1, v2, env, se, XxC, erm, FN, GETPC()); \
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}
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#define DEF_GVEC_VOP2_64(NAME) \
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DEF_GVEC_VOP2_FN(NAME, NAME##64, 64)
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#define DEF_GVEC_VOP2(NAME, OP) \
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DEF_GVEC_VOP2_FN(NAME, float64_##OP, 64)
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DEF_GVEC_VOP2_64(vcdg)
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DEF_GVEC_VOP2_64(vcdlg)
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DEF_GVEC_VOP2_64(vcgd)
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DEF_GVEC_VOP2_64(vclgd)
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DEF_GVEC_VOP2(vfi, round_to_int)
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DEF_GVEC_VOP2(vfsq, sqrt)
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typedef float64 (*vop64_3_fn)(float64 a, float64 b, float_status *s);
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static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vop64_3_fn fn,
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@ -285,125 +333,6 @@ void HELPER(gvec_vfche64s_cc)(void *v1, const void *v2, const void *v3,
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env->cc_op = vfc64(v1, v2, v3, env, true, float64_le_quiet, GETPC());
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}
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static uint64_t vcdg64(uint64_t a, float_status *s)
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{
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return int64_to_float64(a, s);
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}
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void HELPER(gvec_vcdg64)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, false, XxC, erm, vcdg64, GETPC());
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}
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void HELPER(gvec_vcdg64s)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, true, XxC, erm, vcdg64, GETPC());
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}
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static uint64_t vcdlg64(uint64_t a, float_status *s)
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{
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return uint64_to_float64(a, s);
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}
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void HELPER(gvec_vcdlg64)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, false, XxC, erm, vcdlg64, GETPC());
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}
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void HELPER(gvec_vcdlg64s)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, true, XxC, erm, vcdlg64, GETPC());
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}
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static uint64_t vcgd64(uint64_t a, float_status *s)
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{
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const uint64_t tmp = float64_to_int64(a, s);
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return float64_is_any_nan(a) ? INT64_MIN : tmp;
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}
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void HELPER(gvec_vcgd64)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, false, XxC, erm, vcgd64, GETPC());
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}
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void HELPER(gvec_vcgd64s)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, true, XxC, erm, vcgd64, GETPC());
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}
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static uint64_t vclgd64(uint64_t a, float_status *s)
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{
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const uint64_t tmp = float64_to_uint64(a, s);
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return float64_is_any_nan(a) ? 0 : tmp;
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}
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void HELPER(gvec_vclgd64)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, false, XxC, erm, vclgd64, GETPC());
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}
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void HELPER(gvec_vclgd64s)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, true, XxC, erm, vclgd64, GETPC());
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}
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static uint64_t vfi64(uint64_t a, float_status *s)
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{
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return float64_round_to_int(a, s);
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}
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void HELPER(gvec_vfi64)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, false, XxC, erm, vfi64, GETPC());
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}
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void HELPER(gvec_vfi64s)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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const uint8_t erm = extract32(simd_data(desc), 4, 4);
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const bool XxC = extract32(simd_data(desc), 2, 1);
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vop64_2(v1, v2, env, true, XxC, erm, vfi64, GETPC());
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}
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static void vfll32(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
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bool s, uintptr_t retaddr)
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{
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@ -530,23 +459,6 @@ void HELPER(gvec_vfms64s)(void *v1, const void *v2, const void *v3,
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vfma64(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC());
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}
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static uint64_t vfsq64(uint64_t a, float_status *s)
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{
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return float64_sqrt(a, s);
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}
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void HELPER(gvec_vfsq64)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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vop64_2(v1, v2, env, false, false, 0, vfsq64, GETPC());
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}
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void HELPER(gvec_vfsq64s)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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vop64_2(v1, v2, env, true, false, 0, vfsq64, GETPC());
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}
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static int vftci64(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
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bool s, uint16_t i3)
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{
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