diff --git a/MAINTAINERS b/MAINTAINERS index 26c9454823..f22d83c178 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1397,16 +1397,22 @@ R2D M: Yoshinori Sato R: Magnus Damm S: Odd Fixes +F: hw/char/sh_serial.c F: hw/sh4/r2d.c F: hw/intc/sh_intc.c +F: hw/pci-host/sh_pci.c +F: hw/timer/sh_timer.c F: include/hw/sh4/sh_intc.h Shix M: Yoshinori Sato R: Magnus Damm S: Odd Fixes +F: hw/block/tc58128.c +F: hw/char/sh_serial.c F: hw/sh4/shix.c F: hw/intc/sh_intc.c +F: hw/timer/sh_timer.c F: include/hw/sh4/sh_intc.h SPARC Machines diff --git a/hw/block/Kconfig b/hw/block/Kconfig index 2d17f481ad..4fcd152166 100644 --- a/hw/block/Kconfig +++ b/hw/block/Kconfig @@ -22,6 +22,9 @@ config ECC config ONENAND bool +config TC58128 + bool + config NVME_PCI bool default y if PCI_DEVICES diff --git a/hw/block/meson.build b/hw/block/meson.build index 602ca6c854..4bf994c64f 100644 --- a/hw/block/meson.build +++ b/hw/block/meson.build @@ -12,7 +12,7 @@ softmmu_ss.add(when: 'CONFIG_PFLASH_CFI02', if_true: files('pflash_cfi02.c')) softmmu_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80.c')) softmmu_ss.add(when: 'CONFIG_SWIM', if_true: files('swim.c')) softmmu_ss.add(when: 'CONFIG_XEN', if_true: files('xen-block.c')) -softmmu_ss.add(when: 'CONFIG_SH4', if_true: files('tc58128.c')) +softmmu_ss.add(when: 'CONFIG_TC58128', if_true: files('tc58128.c')) softmmu_ss.add(when: 'CONFIG_NVME_PCI', if_true: files('nvme.c', 'nvme-ns.c')) specific_ss.add(when: 'CONFIG_VIRTIO_BLK', if_true: files('virtio-blk.c')) diff --git a/hw/block/tc58128.c b/hw/block/tc58128.c index 9888f01ac6..bfc27ad899 100644 --- a/hw/block/tc58128.c +++ b/hw/block/tc58128.c @@ -1,3 +1,29 @@ +/* + * TC58128 NAND EEPROM emulation + * + * Copyright (c) 2005 Samuel Tardieu + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * SPDX-License-Identifier: MIT + */ #include "qemu/osdep.h" #include "qemu/units.h" #include "hw/sh4/sh.h" diff --git a/hw/char/Kconfig b/hw/char/Kconfig index 939bc44758..f6f4fffd1b 100644 --- a/hw/char/Kconfig +++ b/hw/char/Kconfig @@ -50,6 +50,9 @@ config SCLPCONSOLE config TERMINAL3270 bool +config SH_SCI + bool + config RENESAS_SCI bool diff --git a/hw/char/meson.build b/hw/char/meson.build index 196ac91fa2..afe9a0af88 100644 --- a/hw/char/meson.build +++ b/hw/char/meson.build @@ -31,7 +31,7 @@ softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_uart.c')) softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_aux.c')) softmmu_ss.add(when: 'CONFIG_RENESAS_SCI', if_true: files('renesas_sci.c')) softmmu_ss.add(when: 'CONFIG_SIFIVE_UART', if_true: files('sifive_uart.c')) -softmmu_ss.add(when: 'CONFIG_SH4', if_true: files('sh_serial.c')) +softmmu_ss.add(when: 'CONFIG_SH_SCI', if_true: files('sh_serial.c')) softmmu_ss.add(when: 'CONFIG_STM32F2XX_USART', if_true: files('stm32f2xx_usart.c')) softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_MMUART', if_true: files('mchp_pfsoc_mmuart.c')) diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index c18d11142a..66bf0b90b4 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -53,6 +53,9 @@ config OMPIC config PPC_UIC bool +config SH_INTC + bool + config RX_ICU bool diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 53cba11569..b3d9345a0d 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -47,7 +47,7 @@ specific_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_ic.c', 'bcm2836_co specific_ss.add(when: 'CONFIG_RX_ICU', if_true: files('rx_icu.c')) specific_ss.add(when: 'CONFIG_S390_FLIC', if_true: files('s390_flic.c')) specific_ss.add(when: 'CONFIG_S390_FLIC_KVM', if_true: files('s390_flic_kvm.c')) -specific_ss.add(when: 'CONFIG_SH4', if_true: files('sh_intc.c')) +specific_ss.add(when: 'CONFIG_SH_INTC', if_true: files('sh_intc.c')) specific_ss.add(when: 'CONFIG_SIFIVE_CLINT', if_true: files('sifive_clint.c')) specific_ss.add(when: 'CONFIG_SIFIVE_PLIC', if_true: files('sifive_plic.c')) specific_ss.add(when: 'CONFIG_XICS', if_true: files('xics.c')) diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig index 8b8c763c28..2ccc96f02c 100644 --- a/hw/pci-host/Kconfig +++ b/hw/pci-host/Kconfig @@ -68,3 +68,7 @@ config PCI_POWERNV config REMOTE_PCIHOST bool + +config SH_PCI + bool + select PCI diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build index 1847c69905..87a896973e 100644 --- a/hw/pci-host/meson.build +++ b/hw/pci-host/meson.build @@ -10,6 +10,7 @@ pci_ss.add(when: 'CONFIG_PCI_I440FX', if_true: files('i440fx.c')) pci_ss.add(when: 'CONFIG_PCI_SABRE', if_true: files('sabre.c')) pci_ss.add(when: 'CONFIG_XEN_IGD_PASSTHROUGH', if_true: files('xen_igd_pt.c')) pci_ss.add(when: 'CONFIG_REMOTE_PCIHOST', if_true: files('remote.c')) +pci_ss.add(when: 'CONFIG_SH_PCI', if_true: files('sh_pci.c')) # PPC devices pci_ss.add(when: 'CONFIG_PREP_PCI', if_true: files('prep.c')) diff --git a/hw/sh4/sh_pci.c b/hw/pci-host/sh_pci.c similarity index 100% rename from hw/sh4/sh_pci.c rename to hw/pci-host/sh_pci.c diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig index 4cbce3a0ed..ab733a3f76 100644 --- a/hw/sh4/Kconfig +++ b/hw/sh4/Kconfig @@ -9,16 +9,16 @@ config R2D select USB_OHCI_PCI select PCI select SM501 - select SH4 + select SH7750 + select SH_PCI config SHIX bool select SH7750 - select SH4 + select TC58128 config SH7750 bool - -config SH4 - bool - select PTIMER + select SH_INTC + select SH_SCI + select SH_TIMER diff --git a/hw/sh4/meson.build b/hw/sh4/meson.build index 303c0f4287..424d5674de 100644 --- a/hw/sh4/meson.build +++ b/hw/sh4/meson.build @@ -2,7 +2,6 @@ sh4_ss = ss.source_set() sh4_ss.add(files( 'sh7750.c', 'sh7750_regnames.c', - 'sh_pci.c' )) sh4_ss.add(when: 'CONFIG_R2D', if_true: files('r2d.c')) sh4_ss.add(when: 'CONFIG_SHIX', if_true: files('shix.c')) diff --git a/hw/sh4/sh7750_regs.h b/hw/sh4/sh7750_regs.h index 3e4554af31..ab073dadc7 100644 --- a/hw/sh4/sh7750_regs.h +++ b/hw/sh4/sh7750_regs.h @@ -10,8 +10,28 @@ * Victor V. Vengerov * * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. + * found in this file hereafter or at http://www.rtems.com/license/LICENSE. + * + * LICENSE INFORMATION + * + * RTEMS is free software; you can redistribute it and/or modify it under + * terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. RTEMS is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. You should have received + * a copy of the GNU General Public License along with RTEMS; see + * file COPYING. If not, write to the Free Software Foundation, 675 + * Mass Ave, Cambridge, MA 02139, USA. + * + * As a special exception, including RTEMS header files in a file, + * instantiating RTEMS generics or templates, or linking other files + * with RTEMS objects to produce an executable application, does not + * by itself cause the resulting executable application to be covered + * by the GNU General Public License. This exception does not + * however invalidate any other reasons why the executable file might be + * covered by the GNU Public License. * * @(#) sh7750_regs.h,v 1.2.4.1 2003/09/04 18:46:00 joel Exp */ diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig index 8749edfb6a..18936ef55b 100644 --- a/hw/timer/Kconfig +++ b/hw/timer/Kconfig @@ -36,6 +36,10 @@ config CMSDK_APB_DUALTIMER bool select PTIMER +config SH_TIMER + bool + select PTIMER + config RENESAS_TMR bool diff --git a/hw/timer/meson.build b/hw/timer/meson.build index be343f68fe..26c2701fd7 100644 --- a/hw/timer/meson.build +++ b/hw/timer/meson.build @@ -30,7 +30,7 @@ softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_synctimer.c')) softmmu_ss.add(when: 'CONFIG_PUV3', if_true: files('puv3_ost.c')) softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_timer.c')) softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_systmr.c')) -softmmu_ss.add(when: 'CONFIG_SH4', if_true: files('sh_timer.c')) +softmmu_ss.add(when: 'CONFIG_SH_TIMER', if_true: files('sh_timer.c')) softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_timer.c')) softmmu_ss.add(when: 'CONFIG_STM32F2XX_TIMER', if_true: files('stm32f2xx_timer.c')) softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_timer.c')) diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h index 93f464bf4c..becb596979 100644 --- a/include/hw/sh4/sh.h +++ b/include/hw/sh4/sh.h @@ -1,6 +1,31 @@ -#ifndef QEMU_SH_H -#define QEMU_SH_H -/* Definitions for SH board emulation. */ +/* + * Definitions for SH board emulation + * + * Copyright (c) 2005 Samuel Tardieu + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * SPDX-License-Identifier: MIT + */ +#ifndef QEMU_HW_SH_H +#define QEMU_HW_SH_H #include "hw/sh4/sh_intc.h" #include "target/sh4/cpu-qom.h" diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 714e3b5641..01c4344082 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -271,17 +271,6 @@ typedef SuperHCPU ArchCPU; #include "exec/cpu-all.h" -/* Memory access type */ -enum { - /* Privilege */ - ACCESS_PRIV = 0x01, - /* Direction */ - ACCESS_WRITE = 0x02, - /* Type of instruction */ - ACCESS_CODE = 0x10, - ACCESS_INT = 0x20 -}; - /* MMU control register */ #define MMUCR 0x1F000010 #define MMUCR_AT (1<<0) diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 408478ce5d..bd8e034f17 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -330,22 +330,22 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid MMU_IADDR_ERROR, MMU_DADDR_ERROR_READ, MMU_DADDR_ERROR_WRITE. */ static int get_mmu_address(CPUSH4State * env, target_ulong * physical, - int *prot, target_ulong address, - int rw, int access_type) + int *prot, target_ulong address, + MMUAccessType access_type) { int use_asid, n; tlb_t *matching = NULL; use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD)); - if (rw == 2) { + if (access_type == MMU_INST_FETCH) { n = find_itlb_entry(env, address, use_asid); - if (n >= 0) { - matching = &env->itlb[n]; + if (n >= 0) { + matching = &env->itlb[n]; if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) { - n = MMU_ITLB_VIOLATION; + n = MMU_ITLB_VIOLATION; } else { - *prot = PAGE_EXEC; + *prot = PAGE_EXEC; } } else { n = find_utlb_entry(env, address, use_asid); @@ -365,17 +365,17 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical, } else if (n == MMU_DTLB_MISS) { n = MMU_ITLB_MISS; } - } + } } else { - n = find_utlb_entry(env, address, use_asid); - if (n >= 0) { - matching = &env->utlb[n]; + n = find_utlb_entry(env, address, use_asid); + if (n >= 0) { + matching = &env->utlb[n]; if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) { - n = (rw == 1) ? MMU_DTLB_VIOLATION_WRITE : - MMU_DTLB_VIOLATION_READ; - } else if ((rw == 1) && !(matching->pr & 1)) { + n = (access_type == MMU_DATA_STORE) + ? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ; + } else if ((access_type == MMU_DATA_STORE) && !(matching->pr & 1)) { n = MMU_DTLB_VIOLATION_WRITE; - } else if ((rw == 1) && !matching->d) { + } else if ((access_type == MMU_DATA_STORE) && !matching->d) { n = MMU_DTLB_INITIAL_WRITE; } else { *prot = PAGE_READ; @@ -383,56 +383,56 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical, *prot |= PAGE_WRITE; } } - } else if (n == MMU_DTLB_MISS) { - n = (rw == 1) ? MMU_DTLB_MISS_WRITE : - MMU_DTLB_MISS_READ; - } + } else if (n == MMU_DTLB_MISS) { + n = (access_type == MMU_DATA_STORE) + ? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ; + } } if (n >= 0) { - n = MMU_OK; - *physical = ((matching->ppn << 10) & ~(matching->size - 1)) | - (address & (matching->size - 1)); + n = MMU_OK; + *physical = ((matching->ppn << 10) & ~(matching->size - 1)) + | (address & (matching->size - 1)); } return n; } static int get_physical_address(CPUSH4State * env, target_ulong * physical, int *prot, target_ulong address, - int rw, int access_type) + MMUAccessType access_type) { /* P1, P2 and P4 areas do not use translation */ - if ((address >= 0x80000000 && address < 0xc0000000) || - address >= 0xe0000000) { + if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) { if (!(env->sr & (1u << SR_MD)) - && (address < 0xe0000000 || address >= 0xe4000000)) { - /* Unauthorized access in user mode (only store queues are available) */ + && (address < 0xe0000000 || address >= 0xe4000000)) { + /* Unauthorized access in user mode (only store queues are available) */ qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n"); - if (rw == 0) - return MMU_DADDR_ERROR_READ; - else if (rw == 1) - return MMU_DADDR_ERROR_WRITE; - else - return MMU_IADDR_ERROR; - } - if (address >= 0x80000000 && address < 0xc0000000) { - /* Mask upper 3 bits for P1 and P2 areas */ - *physical = address & 0x1fffffff; - } else { - *physical = address; - } - *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; - return MMU_OK; + if (access_type == MMU_DATA_LOAD) { + return MMU_DADDR_ERROR_READ; + } else if (access_type == MMU_DATA_STORE) { + return MMU_DADDR_ERROR_WRITE; + } else { + return MMU_IADDR_ERROR; + } + } + if (address >= 0x80000000 && address < 0xc0000000) { + /* Mask upper 3 bits for P1 and P2 areas */ + *physical = address & 0x1fffffff; + } else { + *physical = address; + } + *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + return MMU_OK; } /* If MMU is disabled, return the corresponding physical page */ if (!(env->mmucr & MMUCR_AT)) { - *physical = address & 0x1FFFFFFF; - *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; - return MMU_OK; + *physical = address & 0x1FFFFFFF; + *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + return MMU_OK; } /* We need to resort to the MMU */ - return get_mmu_address(env, physical, prot, address, rw, access_type); + return get_mmu_address(env, physical, prot, address, access_type); } hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) @@ -441,7 +441,8 @@ hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) target_ulong physical; int prot; - get_physical_address(&cpu->env, &physical, &prot, addr, 0, 0); + get_physical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD); + return physical; } @@ -813,11 +814,9 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMU_DTLB_VIOLATION_READ); #else target_ulong physical; - int prot, sh_access_type; + int prot; - sh_access_type = ACCESS_INT; - ret = get_physical_address(env, &physical, &prot, address, - access_type, sh_access_type); + ret = get_physical_address(env, &physical, &prot, address, access_type); if (ret == MMU_OK) { address &= TARGET_PAGE_MASK;