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target/ppc: Reduce env->hflags to uint32_t
It will be stored in tb->flags, which is also uint32_t, so let's use the correct size. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210323184340.619757-4-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -1129,8 +1129,8 @@ struct CPUPPCState {
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bool resume_as_sreset;
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#endif
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/* These resources are used only in QEMU core */
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target_ulong hflags;
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/* These resources are used only in TCG */
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uint32_t hflags;
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target_ulong hflags_compat_nmsr; /* for migration compatibility */
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int immu_idx; /* precomputed MMU index to speed up insn accesses */
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int dmmu_idx; /* precomputed MMU index to speed up data accesses */
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@ -199,7 +199,7 @@ void helper_store_hid0_601(CPUPPCState *env, target_ulong val)
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if ((val ^ hid0) & 0x00000008) {
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/* Change current endianness */
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hreg_compute_hflags(env);
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qemu_log("%s: set endianness to %c => " TARGET_FMT_lx "\n", __func__,
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qemu_log("%s: set endianness to %c => %08x\n", __func__,
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val & 0x8 ? 'l' : 'b', env->hflags);
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}
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}
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@ -7657,7 +7657,7 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
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env->nip, env->lr, env->ctr, cpu_read_xer(env),
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cs->cpu_index);
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qemu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF "
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TARGET_FMT_lx " iidx %d didx %d\n",
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"%08x iidx %d didx %d\n",
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env->msr, env->spr[SPR_HID0],
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env->hflags, env->immu_idx, env->dmmu_idx);
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#if !defined(NO_TIMER_DUMP)
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