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Rename pci_register_io_region() to pci_register_bar()

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This function is used to manage a PCI BAR, so make the more generic
pci_register_io_region() available to other uses.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Avi Kivity 2009-06-14 11:38:53 +03:00 committed by Anthony Liguori
parent e9179ce1a0
commit 28c2c26495
21 changed files with 40 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hw/ac97.c
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@ -1366,8 +1366,8 @@ int ac97_init (PCIBus *bus)
c[0x3c] = 0x00; /* intr_ln interrupt line rw */
c[0x3d] = 0x01; /* intr_pn interrupt pin ro */
pci_register_io_region (&d->dev, 0, 256 * 4, PCI_ADDRESS_SPACE_IO, ac97_map);
pci_register_io_region (&d->dev, 1, 64 * 4, PCI_ADDRESS_SPACE_IO, ac97_map);
pci_register_bar (&d->dev, 0, 256 * 4, PCI_ADDRESS_SPACE_IO, ac97_map);
pci_register_bar (&d->dev, 1, 64 * 4, PCI_ADDRESS_SPACE_IO, ac97_map);
register_savevm ("ac97", 0, 2, ac97_save, ac97_load, s);
qemu_register_reset (ac97_on_reset, 0, s);
AUD_register_card ("ac97", &s->card);

4
hw/cirrus_vga.c
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@ -3336,10 +3336,10 @@ void pci_cirrus_vga_init(PCIBus *bus)
/* memory #0 LFB */
/* memory #1 memory-mapped I/O */
/* XXX: s->vga.vram_size must be a power of two */
pci_register_io_region((PCIDevice *)d, 0, 0x2000000,
pci_register_bar((PCIDevice *)d, 0, 0x2000000,
PCI_ADDRESS_SPACE_MEM_PREFETCH, cirrus_pci_lfb_map);
if (device_id == CIRRUS_ID_CLGD5446) {
pci_register_io_region((PCIDevice *)d, 1, CIRRUS_PNPMMIO_SIZE,
pci_register_bar((PCIDevice *)d, 1, CIRRUS_PNPMMIO_SIZE,
PCI_ADDRESS_SPACE_MEM, cirrus_pci_mmio_map);
}
/* XXX: ROM BIOS */

4
hw/e1000.c
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@ -1104,10 +1104,10 @@ static void pci_e1000_init(PCIDevice *pci_dev)
d->mmio_index = cpu_register_io_memory(e1000_mmio_read,
e1000_mmio_write, d);
pci_register_io_region((PCIDevice *)d, 0, PNPMMIO_SIZE,
pci_register_bar((PCIDevice *)d, 0, PNPMMIO_SIZE,
PCI_ADDRESS_SPACE_MEM, e1000_mmio_map);
pci_register_io_region((PCIDevice *)d, 1, IOPORT_SIZE,
pci_register_bar((PCIDevice *)d, 1, IOPORT_SIZE,
PCI_ADDRESS_SPACE_IO, ioport_map);
memmove(d->eeprom_data, e1000_eeprom_template,

6
hw/eepro100.c
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@ -1752,12 +1752,12 @@ static void nic_init(PCIDevice *pci_dev, uint32_t device)
d->eepro100.mmio_index =
cpu_register_io_memory(pci_mmio_read, pci_mmio_write, s);
pci_register_io_region(&d->dev, 0, PCI_MEM_SIZE,
pci_register_bar(&d->dev, 0, PCI_MEM_SIZE,
PCI_ADDRESS_SPACE_MEM |
PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_mmio_map);
pci_register_io_region(&d->dev, 1, PCI_IO_SIZE, PCI_ADDRESS_SPACE_IO,
pci_register_bar(&d->dev, 1, PCI_IO_SIZE, PCI_ADDRESS_SPACE_IO,
pci_map);
pci_register_io_region(&d->dev, 2, PCI_FLASH_SIZE, PCI_ADDRESS_SPACE_MEM,
pci_register_bar(&d->dev, 2, PCI_FLASH_SIZE, PCI_ADDRESS_SPACE_MEM,
pci_mmio_map);
qdev_get_macaddr(&d->dev.qdev, s->macaddr);

2
hw/es1370.c
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@ -1053,7 +1053,7 @@ int es1370_init (PCIBus *bus)
s = &d->es1370;
s->pci_dev = &d->dev;
pci_register_io_region (&d->dev, 0, 256, PCI_ADDRESS_SPACE_IO, es1370_map);
pci_register_bar (&d->dev, 0, 256, PCI_ADDRESS_SPACE_IO, es1370_map);
register_savevm ("es1370", 0, 2, es1370_save, es1370_load, s);
qemu_register_reset (es1370_on_reset, 0, s);

14
hw/ide.c
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@ -3309,15 +3309,15 @@ void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
pci_conf[0x51] |= 0x08; /* enable IDE1 */
}
pci_register_io_region((PCIDevice *)d, 0, 0x8,
pci_register_bar((PCIDevice *)d, 0, 0x8,
PCI_ADDRESS_SPACE_IO, ide_map);
pci_register_io_region((PCIDevice *)d, 1, 0x4,
pci_register_bar((PCIDevice *)d, 1, 0x4,
PCI_ADDRESS_SPACE_IO, ide_map);
pci_register_io_region((PCIDevice *)d, 2, 0x8,
pci_register_bar((PCIDevice *)d, 2, 0x8,
PCI_ADDRESS_SPACE_IO, ide_map);
pci_register_io_region((PCIDevice *)d, 3, 0x4,
pci_register_bar((PCIDevice *)d, 3, 0x4,
PCI_ADDRESS_SPACE_IO, ide_map);
pci_register_io_region((PCIDevice *)d, 4, 0x10,
pci_register_bar((PCIDevice *)d, 4, 0x10,
PCI_ADDRESS_SPACE_IO, bmdma_map);
pci_conf[0x3d] = 0x01; // interrupt on pin 1
@ -3376,7 +3376,7 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
qemu_register_reset(piix3_reset, 0, d);
piix3_reset(d);
pci_register_io_region((PCIDevice *)d, 4, 0x10,
pci_register_bar((PCIDevice *)d, 4, 0x10,
PCI_ADDRESS_SPACE_IO, bmdma_map);
ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], pic[14]);
@ -3416,7 +3416,7 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
qemu_register_reset(piix3_reset, 0, d);
piix3_reset(d);
pci_register_io_region((PCIDevice *)d, 4, 0x10,
pci_register_bar((PCIDevice *)d, 4, 0x10,
PCI_ADDRESS_SPACE_IO, bmdma_map);
ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], pic[14]);

6
hw/lsi53c895a.c
View File

@ -2003,11 +2003,11 @@ static void lsi_scsi_init(PCIDevice *dev)
s->ram_io_addr = cpu_register_io_memory(lsi_ram_readfn,
lsi_ram_writefn, s);
pci_register_io_region((struct PCIDevice *)s, 0, 256,
pci_register_bar((struct PCIDevice *)s, 0, 256,
PCI_ADDRESS_SPACE_IO, lsi_io_mapfunc);
pci_register_io_region((struct PCIDevice *)s, 1, 0x400,
pci_register_bar((struct PCIDevice *)s, 1, 0x400,
PCI_ADDRESS_SPACE_MEM, lsi_mmio_mapfunc);
pci_register_io_region((struct PCIDevice *)s, 2, 0x2000,
pci_register_bar((struct PCIDevice *)s, 2, 0x2000,
PCI_ADDRESS_SPACE_MEM, lsi_ram_mapfunc);
s->queue = qemu_malloc(sizeof(lsi_queue));
s->queue_len = 1;

2
hw/macio.c
View File

@ -114,6 +114,6 @@ void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
d->config[0x3d] = 0x01; // interrupt on pin 1
pci_register_io_region(d, 0, 0x80000,
pci_register_bar(d, 0, 0x80000,
PCI_ADDRESS_SPACE_MEM, macio_map);
}

2
hw/ne2000.c
View File

@ -816,7 +816,7 @@ static void pci_ne2000_init(PCIDevice *pci_dev)
pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
pci_conf[0x3d] = 1; // interrupt pin 0
pci_register_io_region(&d->dev, 0, 0x100,
pci_register_bar(&d->dev, 0, 0x100,
PCI_ADDRESS_SPACE_IO, ne2000_map);
s = &d->ne2000;
s->irq = d->dev.irq[0];

2
hw/openpic.c
View File

@ -1212,7 +1212,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
pci_conf[0x3d] = 0x00; // no interrupt pin
/* Register I/O spaces */
pci_register_io_region((PCIDevice *)opp, 0, 0x40000,
pci_register_bar((PCIDevice *)opp, 0, 0x40000,
PCI_ADDRESS_SPACE_MEM, &openpic_map);
} else {
opp = qemu_mallocz(sizeof(openpic_t));

2
hw/pci.c
View File

@ -322,7 +322,7 @@ int pci_unregister_device(PCIDevice *pci_dev)
return 0;
}
void pci_register_io_region(PCIDevice *pci_dev, int region_num,
void pci_register_bar(PCIDevice *pci_dev, int region_num,
uint32_t size, int type,
PCIMapIORegionFunc *map_func)
{

2
hw/pci.h
View File

@ -166,7 +166,7 @@ PCIDevice *pci_register_device(PCIBus *bus, const char *name,
PCIConfigWriteFunc *config_write);
int pci_unregister_device(PCIDevice *pci_dev);
void pci_register_io_region(PCIDevice *pci_dev, int region_num,
void pci_register_bar(PCIDevice *pci_dev, int region_num,
uint32_t size, int type,
PCIMapIORegionFunc *map_func);

4
hw/pcnet.c
View File

@ -2050,10 +2050,10 @@ static void pci_pcnet_init(PCIDevice *pci_dev)
s->mmio_index =
cpu_register_io_memory(pcnet_mmio_read, pcnet_mmio_write, &d->state);
pci_register_io_region((PCIDevice *)d, 0, PCNET_IOPORT_SIZE,
pci_register_bar((PCIDevice *)d, 0, PCNET_IOPORT_SIZE,
PCI_ADDRESS_SPACE_IO, pcnet_ioport_map);
pci_register_io_region((PCIDevice *)d, 1, PCNET_PNPMMIO_SIZE,
pci_register_bar((PCIDevice *)d, 1, PCNET_PNPMMIO_SIZE,
PCI_ADDRESS_SPACE_MEM, pcnet_mmio_map);
s->irq = pci_dev->irq[0];

4
hw/rtl8139.c
View File

@ -3471,10 +3471,10 @@ static void pci_rtl8139_init(PCIDevice *dev)
s->rtl8139_mmio_io_addr =
cpu_register_io_memory(rtl8139_mmio_read, rtl8139_mmio_write, s);
pci_register_io_region(&d->dev, 0, 0x100,
pci_register_bar(&d->dev, 0, 0x100,
PCI_ADDRESS_SPACE_IO, rtl8139_ioport_map);
pci_register_io_region(&d->dev, 1, 0x100,
pci_register_bar(&d->dev, 1, 0x100,
PCI_ADDRESS_SPACE_MEM, rtl8139_mmio_map);
s->pci_dev = (PCIDevice *)d;

4
hw/sun4u.c
View File

@ -320,9 +320,9 @@ pci_ebus_init(PCIBus *bus, int devfn)
s->config[0x0D] = 0x0a; // latency_timer
s->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
pci_register_io_region(s, 0, 0x1000000, PCI_ADDRESS_SPACE_MEM,
pci_register_bar(s, 0, 0x1000000, PCI_ADDRESS_SPACE_MEM,
ebus_mmio_mapfunc);
pci_register_io_region(s, 1, 0x800000, PCI_ADDRESS_SPACE_MEM,
pci_register_bar(s, 1, 0x800000, PCI_ADDRESS_SPACE_MEM,
ebus_mmio_mapfunc);
}

2
hw/usb-ohci.c
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@ -1732,7 +1732,7 @@ void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn)
usb_ohci_init(&ohci->state, num_ports, devfn, ohci->pci_dev.irq[0],
OHCI_TYPE_PCI, ohci->pci_dev.name, 0);
pci_register_io_region((struct PCIDevice *)ohci, 0, 256,
pci_register_bar((struct PCIDevice *)ohci, 0, 256,
PCI_ADDRESS_SPACE_MEM, ohci_mapfunc);
}

4
hw/usb-uhci.c
View File

@ -1097,7 +1097,7 @@ void usb_uhci_piix3_init(PCIBus *bus, int devfn)
/* Use region 4 for consistency with real hardware. BSD guests seem
to rely on this. */
pci_register_io_region(&s->dev, 4, 0x20,
pci_register_bar(&s->dev, 4, 0x20,
PCI_ADDRESS_SPACE_IO, uhci_map);
register_savevm("uhci", 0, 1, uhci_save, uhci_load, s);
@ -1131,7 +1131,7 @@ void usb_uhci_piix4_init(PCIBus *bus, int devfn)
/* Use region 4 for consistency with real hardware. BSD guests seem
to rely on this. */
pci_register_io_region(&s->dev, 4, 0x20,
pci_register_bar(&s->dev, 4, 0x20,
PCI_ADDRESS_SPACE_IO, uhci_map);
register_savevm("uhci", 0, 1, uhci_save, uhci_load, s);

4
hw/vga.c
View File

@ -2510,7 +2510,7 @@ int pci_vga_init(PCIBus *bus,
pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
/* XXX: VGA_RAM_SIZE must be a power of two */
pci_register_io_region(&d->dev, 0, VGA_RAM_SIZE,
pci_register_bar(&d->dev, 0, VGA_RAM_SIZE,
PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
if (vga_bios_size != 0) {
unsigned int bios_total_size;
@ -2520,7 +2520,7 @@ int pci_vga_init(PCIBus *bus,
bios_total_size = 1;
while (bios_total_size < vga_bios_size)
bios_total_size <<= 1;
pci_register_io_region(&d->dev, PCI_ROM_SLOT, bios_total_size,
pci_register_bar(&d->dev, PCI_ROM_SLOT, bios_total_size,
PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
}
return 0;

2
hw/virtio-pci.c
View File

@ -276,7 +276,7 @@ static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
if (size & (size-1))
size = 1 << qemu_fls(size);
pci_register_io_region(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
virtio_map);
virtio_bind_device(vdev, &virtio_pci_bindings, proxy);

4
hw/vmware_vga.c
View File

@ -1231,9 +1231,9 @@ void pci_vmsvga_init(PCIBus *bus)
s->card.config[0x2f] = SVGA_PCI_DEVICE_ID >> 8;
s->card.config[0x3c] = 0xff; /* End */
pci_register_io_region(&s->card, 0, 0x10,
pci_register_bar(&s->card, 0, 0x10,
PCI_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport);
pci_register_io_region(&s->card, 1, VGA_RAM_SIZE,
pci_register_bar(&s->card, 1, VGA_RAM_SIZE,
PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
vmsvga_init(&s->chip, VGA_RAM_SIZE);

2
hw/wdt_i6300esb.c
View File

@ -451,7 +451,7 @@ static void i6300esb_pc_init(PCIBus *pci_bus)
pci_config_set_class(pci_conf, PCI_CLASS_SYSTEM_OTHER);
pci_conf[0x0e] = 0x00;
pci_register_io_region(&d->dev, 0, 0x10,
pci_register_bar(&d->dev, 0, 0x10,
PCI_ADDRESS_SPACE_MEM, i6300esb_map);
register_savevm("i6300esb_wdt", -1, sizeof(I6300State),