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target-arm: Add support for PKHxx in thumb2

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The PKHxx instructions were not recognized by the thumb2 decoder. The
solution provided in this changeset is identical to the arm-mode
implementation.

Signed-off-by: Johan Bengtsson <teofrastius@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
This commit is contained in:
Johan Bengtsson 2010-12-07 12:01:44 +00:00 committed by Peter Maydell
parent 2c90fe2b71
commit 2af9ab7737
1 changed files with 45 additions and 18 deletions
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31
target-arm/translate.c
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@ -7601,7 +7601,33 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
} }
} }
break; break;
case 5: /* Data processing register constant shift. */ case 5:
op = (insn >> 21) & 0xf;
if (op == 6) {
/* Halfword pack. */
tmp = load_reg(s, rn);
tmp2 = load_reg(s, rm);
shift = ((insn >> 10) & 0x1c) | ((insn >> 6) & 0x3);
if (insn & (1 << 5)) {
/* pkhtb */
if (shift == 0)
shift = 31;
tcg_gen_sari_i32(tmp2, tmp2, shift);
tcg_gen_andi_i32(tmp, tmp, 0xffff0000);
tcg_gen_ext16u_i32(tmp2, tmp2);
} else {
/* pkhbt */
if (shift)
tcg_gen_shli_i32(tmp2, tmp2, shift);
tcg_gen_ext16u_i32(tmp, tmp);
tcg_gen_andi_i32(tmp2, tmp2, 0xffff0000);
}
tcg_gen_or_i32(tmp, tmp, tmp2);
dead_tmp(tmp2);
store_reg(s, rd, tmp);
} else {
/* Data processing register constant shift. */
if (rn == 15) { if (rn == 15) {
tmp = new_tmp(); tmp = new_tmp();
tcg_gen_movi_i32(tmp, 0); tcg_gen_movi_i32(tmp, 0);
@ -7609,7 +7635,7 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
tmp = load_reg(s, rn); tmp = load_reg(s, rn);
} }
tmp2 = load_reg(s, rm); tmp2 = load_reg(s, rm);
op = (insn >> 21) & 0xf;
shiftop = (insn >> 4) & 3; shiftop = (insn >> 4) & 3;
shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c); shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c);
conds = (insn & (1 << 20)) != 0; conds = (insn & (1 << 20)) != 0;
@ -7623,6 +7649,7 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
} else { } else {
dead_tmp(tmp); dead_tmp(tmp);
} }
}
break; break;
case 13: /* Misc data processing. */ case 13: /* Misc data processing. */
op = ((insn >> 22) & 6) | ((insn >> 7) & 1); op = ((insn >> 22) & 6) | ((insn >> 7) & 1);