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tcg-mips: implement nor
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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parent
6adc05492f
commit
2b79487a56
@ -1239,6 +1239,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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tcg_out_opc_reg(s, OPC_OR, args[0], args[1], args[2]);
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}
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break;
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case INDEX_op_nor_i32:
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tcg_out_opc_reg(s, OPC_NOR, args[0], args[1], args[2]);
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break;
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case INDEX_op_not_i32:
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tcg_out_opc_reg(s, OPC_NOR, args[0], args[1], args[1]);
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break;
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@ -1350,6 +1353,7 @@ static const TCGTargetOpDef mips_op_defs[] = {
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{ INDEX_op_sub_i32, { "r", "rZ", "rJZ" } },
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{ INDEX_op_and_i32, { "r", "rZ", "rIZ" } },
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{ INDEX_op_nor_i32, { "r", "rZ", "rZ" } },
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{ INDEX_op_not_i32, { "r", "rZ" } },
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{ INDEX_op_or_i32, { "r", "rZ", "rIZ" } },
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{ INDEX_op_xor_i32, { "r", "rZ", "rIZ" } },
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@ -80,6 +80,7 @@ enum {
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/* optional instructions */
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#define TCG_TARGET_HAS_div_i32
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#define TCG_TARGET_HAS_not_i32
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#define TCG_TARGET_HAS_nor_i32
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#undef TCG_TARGET_HAS_rot_i32
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#undef TCG_TARGET_HAS_ext8s_i32
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#undef TCG_TARGET_HAS_ext16s_i32
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@ -89,7 +90,6 @@ enum {
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#undef TCG_TARGET_HAS_orc_i32
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#undef TCG_TARGET_HAS_eqv_i32
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#undef TCG_TARGET_HAS_nand_i32
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#undef TCG_TARGET_HAS_nor_i32
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/* optional instructions automatically implemented */
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#undef TCG_TARGET_HAS_neg_i32 /* sub rd, zero, rt */
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