apic: Fix access to non-existent APIC

When running with -M isapc, there is no env->apic_state. Fix
cpu_get/set_apic_* helpers to handle this corner case gracefully.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7048 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-04-08 22:56:26 +00:00
parent b7df4bcc00
commit 2c7c13d4b8

View File

@ -280,6 +280,8 @@ void cpu_set_apic_base(CPUState *env, uint64_t val)
#ifdef DEBUG_APIC
printf("cpu_set_apic_base: %016" PRIx64 "\n", val);
#endif
if (!s)
return;
s->apicbase = (val & 0xfffff000) |
(s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE));
/* if disabled, cannot be enabled again */
@ -294,14 +296,17 @@ uint64_t cpu_get_apic_base(CPUState *env)
{
APICState *s = env->apic_state;
#ifdef DEBUG_APIC
printf("cpu_get_apic_base: %016" PRIx64 "\n", (uint64_t)s->apicbase);
printf("cpu_get_apic_base: %016" PRIx64 "\n",
s ? (uint64_t)s->apicbase: 0);
#endif
return s->apicbase;
return s ? s->apicbase : 0;
}
void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
{
APICState *s = env->apic_state;
if (!s)
return;
s->tpr = (val & 0x0f) << 4;
apic_update_irq(s);
}
@ -309,7 +314,7 @@ void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
uint8_t cpu_get_apic_tpr(CPUX86State *env)
{
APICState *s = env->apic_state;
return s->tpr >> 4;
return s ? s->tpr >> 4 : 0;
}
/* return -1 if no bit is set */