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ARM host fixes
Minor TCG cleanups and warning fixes for ARM hosts. Signed-off-by: Paul Brook <paul@codesourcery.com>
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5e65000260
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@ -1567,7 +1567,7 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
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tcg_out_st32(s, COND_AL, arg, arg1, arg2);
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}
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void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
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static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
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{
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if (val > 0)
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if (val < 0x100)
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@ -51,9 +51,10 @@ enum {
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TCG_REG_R12,
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TCG_REG_R13,
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TCG_REG_R14,
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TCG_TARGET_NB_REGS
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};
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#define TCG_TARGET_NB_REGS 15
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/* used for function call generation */
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#define TCG_REG_CALL_STACK TCG_REG_R13
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#define TCG_TARGET_STACK_ALIGN 8
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@ -69,8 +70,7 @@ enum {
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static inline void flush_icache_range(unsigned long start, unsigned long stop)
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{
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#if QEMU_GNUC_PREREQ(4, 1)
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void __clear_cache(char *beg, char *end);
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__clear_cache((char *) start, (char *) stop);
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__builtin___clear_cache((char *) start, (char *) stop);
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#else
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register unsigned long _beg __asm ("a1") = start;
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register unsigned long _end __asm ("a2") = stop;
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