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disas/: fix some comment spelling errors

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I found that there are many spelling errors in the comments of qemu,
so I used the spellcheck tool to check the spelling errors
and finally found some spelling errors in the disas folder.

Signed-off-by: zhaolichang <zhaolichang@huawei.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20200917075029.313-9-zhaolichang@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
zhaolichang 2020-09-17 15:50:27 +08:00 committed by Laurent Vivier
parent 6f9ff551a4
commit 2dbb13089f
3 changed files with 6 additions and 6 deletions
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2
disas/hppa.c
View File

@ -2021,7 +2021,7 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
fput_fp_reg (GET_FIELD (insn, 6, 10), info);
break;
/* 'fA' will not generate a space before the regsiter
/* 'fA' will not generate a space before the register
name. Normally that is fine. Except that it
causes problems with xmpyu which has no FP format
completer. */

8
disas/m68k.c
View File

@ -70,7 +70,7 @@ struct floatformat
unsigned int exp_start;
unsigned int exp_len;
/* Bias added to a "true" exponent to form the biased exponent. It
is intentionally signed as, otherwize, -exp_bias can turn into a
is intentionally signed as, otherwise, -exp_bias can turn into a
very large number (e.g., given the exp_bias of 0x3fff and a 64
bit long, the equation (long)(1 - exp_bias) evaluates to
4294950914) instead of -16382). */
@ -479,7 +479,7 @@ struct m68k_opcode_alias
and remaining 3 bits of register shifted 9 bits in first word.
Indicate upper/lower in 1 bit shifted 7 bits in second word.
Use with `R' or `u' format.
n `m' withouth upper/lower indication. (For M[S]ACx; 4 bits split
n `m' without upper/lower indication. (For M[S]ACx; 4 bits split
with MSB shifted 6 bits in first word and remaining 3 bits of
register shifted 9 bits in first word. No upper/lower
indication is done.) Use with `R' or `u' format.
@ -854,7 +854,7 @@ fetch_arg (unsigned char *buffer,
/* Check if an EA is valid for a particular code. This is required
for the EMAC instructions since the type of source address determines
if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
if it is a EMAC-load instruction if the EA is mode 2-5, otherwise it
is a non-load EMAC instruction and the bits mean register Ry.
A similar case exists for the movem instructions where the register
mask is interpreted differently for different EAs. */
@ -1080,7 +1080,7 @@ print_indexed (int basereg,
/* Returns number of bytes "eaten" by the operand, or
return -1 if an invalid operand was found, or -2 if
an opcode tabe error was found.
an opcode table error was found.
ADDR is the pc for this arg to be relative to. */
static int

2
disas/ppc.c
View File

@ -5226,7 +5226,7 @@ operand_value_powerpc (const struct powerpc_operand *operand,
if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
{
/* BITM is always some number of zeros followed by some
number of ones, followed by some numer of zeros. */
number of ones, followed by some number of zeros. */
unsigned long top = operand->bitm;
/* top & -top gives the rightmost 1 bit, so this
fills in any trailing zeros. */