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target/arm: Convert T16 adjust sp (immediate)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190904193059.26202-56-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -156,6 +156,15 @@ ADD_rrri 0100 0100 . .... ... @addsub_2h s=0
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CMP_xrri 0100 0101 . .... ... @addsub_2h s=1
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MOV_rxri 0100 0110 . .... ... @addsub_2h s=0
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# Adjust SP (immediate)
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%imm7_0x4 0:7 !function=times_4
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@addsub_sp_i .... .... . ....... \
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&s_rri_rot s=0 rd=13 rn=13 rot=0 imm=%imm7_0x4
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ADD_rri 1011 0000 0 ....... @addsub_sp_i
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SUB_rri 1011 0000 1 ....... @addsub_sp_i
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# Branch and exchange
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@branchr .... .... . rm:4 ... &r
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@ -10765,19 +10765,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn)
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/* misc */
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op = (insn >> 8) & 0xf;
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switch (op) {
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case 0:
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/*
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* 0b1011_0000_xxxx_xxxx
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* - ADD (SP plus immediate)
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* - SUB (SP minus immediate)
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*/
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tmp = load_reg(s, 13);
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val = (insn & 0x7f) * 4;
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if (insn & (1 << 7))
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val = -(int32_t)val;
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tcg_gen_addi_i32(tmp, tmp, val);
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store_sp_checked(s, tmp);
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break;
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case 0: /* add/sub (sp, immediate), in decodetree */
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goto illegal_op;
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case 2: /* sign/zero extend. */
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ARCH(6);
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