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target/tricore: Use tcg_gen_abs_tl

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Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20190423102145.14812-3-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2019-04-23 12:21:45 +02:00 committed by Richard Henderson
parent fa45f61114
commit 2f8036d236
1 changed files with 5 additions and 22 deletions
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27
target/tricore/translate.c
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@ -2415,11 +2415,7 @@ gen_msubadr32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode)
static inline void gen_abs(TCGv ret, TCGv r1) static inline void gen_abs(TCGv ret, TCGv r1)
{ {
TCGv temp = tcg_temp_new(); tcg_gen_abs_tl(ret, r1);
TCGv t0 = tcg_const_i32(0);
tcg_gen_neg_tl(temp, r1);
tcg_gen_movcond_tl(TCG_COND_GE, ret, r1, t0, r1, temp);
/* overflow can only happen, if r1 = 0x80000000 */ /* overflow can only happen, if r1 = 0x80000000 */
tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, r1, 0x80000000); tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, r1, 0x80000000);
tcg_gen_shli_tl(cpu_PSW_V, cpu_PSW_V, 31); tcg_gen_shli_tl(cpu_PSW_V, cpu_PSW_V, 31);
@ -2430,9 +2426,6 @@ static inline void gen_abs(TCGv ret, TCGv r1)
tcg_gen_xor_tl(cpu_PSW_AV, ret, cpu_PSW_AV); tcg_gen_xor_tl(cpu_PSW_AV, ret, cpu_PSW_AV);
/* calc SAV bit */ /* calc SAV bit */
tcg_gen_or_tl(cpu_PSW_SAV, cpu_PSW_SAV, cpu_PSW_AV); tcg_gen_or_tl(cpu_PSW_SAV, cpu_PSW_SAV, cpu_PSW_AV);
tcg_temp_free(temp);
tcg_temp_free(t0);
} }
static inline void gen_absdif(TCGv ret, TCGv r1, TCGv r2) static inline void gen_absdif(TCGv ret, TCGv r1, TCGv r2)
@ -6617,13 +6610,8 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx)
tcg_gen_movi_tl(cpu_PSW_AV, 0); tcg_gen_movi_tl(cpu_PSW_AV, 0);
if (!tricore_feature(env, TRICORE_FEATURE_131)) { if (!tricore_feature(env, TRICORE_FEATURE_131)) {
/* overflow = (abs(D[r3+1]) >= abs(D[r2])) */ /* overflow = (abs(D[r3+1]) >= abs(D[r2])) */
tcg_gen_neg_tl(temp, temp3); tcg_gen_abs_tl(temp, temp3);
/* use cpu_PSW_AV to compare against 0 */ tcg_gen_abs_tl(temp2, cpu_gpr_d[r2]);
tcg_gen_movcond_tl(TCG_COND_LT, temp, temp3, cpu_PSW_AV,
temp, temp3);
tcg_gen_neg_tl(temp2, cpu_gpr_d[r2]);
tcg_gen_movcond_tl(TCG_COND_LT, temp2, cpu_gpr_d[r2], cpu_PSW_AV,
temp2, cpu_gpr_d[r2]);
tcg_gen_setcond_tl(TCG_COND_GE, cpu_PSW_V, temp, temp2); tcg_gen_setcond_tl(TCG_COND_GE, cpu_PSW_V, temp, temp2);
} else { } else {
/* overflow = (D[b] == 0) */ /* overflow = (D[b] == 0) */
@ -6655,13 +6643,8 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx)
tcg_gen_movi_tl(cpu_PSW_AV, 0); tcg_gen_movi_tl(cpu_PSW_AV, 0);
if (!tricore_feature(env, TRICORE_FEATURE_131)) { if (!tricore_feature(env, TRICORE_FEATURE_131)) {
/* overflow = (abs(D[r3+1]) >= abs(D[r2])) */ /* overflow = (abs(D[r3+1]) >= abs(D[r2])) */
tcg_gen_neg_tl(temp, temp3); tcg_gen_abs_tl(temp, temp3);
/* use cpu_PSW_AV to compare against 0 */ tcg_gen_abs_tl(temp2, cpu_gpr_d[r2]);
tcg_gen_movcond_tl(TCG_COND_LT, temp, temp3, cpu_PSW_AV,
temp, temp3);
tcg_gen_neg_tl(temp2, cpu_gpr_d[r2]);
tcg_gen_movcond_tl(TCG_COND_LT, temp2, cpu_gpr_d[r2], cpu_PSW_AV,
temp2, cpu_gpr_d[r2]);
tcg_gen_setcond_tl(TCG_COND_GE, cpu_PSW_V, temp, temp2); tcg_gen_setcond_tl(TCG_COND_GE, cpu_PSW_V, temp, temp2);
} else { } else {
/* overflow = (D[b] == 0) */ /* overflow = (D[b] == 0) */