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arm11mpcore: Convert mpcore_rirq_state to QOM realize
Embed ARM11MPCorePriveState and RealViewGICState and replace SysBus initfn with realizefn. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
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@ -10,6 +10,7 @@
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#include "hw/sysbus.h"
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#include "hw/misc/arm11scu.h"
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#include "hw/intc/arm_gic.h"
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#include "hw/intc/realview_gic.h"
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#include "hw/timer/arm_mptimer.h"
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#include "qemu/timer.h"
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@ -168,10 +169,12 @@ static void mpcore_priv_initfn(Object *obj)
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typedef struct {
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SysBusDevice parent_obj;
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SysBusDevice *priv;
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qemu_irq cpuic[32];
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qemu_irq rvic[4][64];
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uint32_t num_cpu;
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ARM11MPCorePriveState priv;
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RealViewGICState gic[4];
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} mpcore_rirq_state;
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/* Map baseboard IRQs onto CPU IRQ lines. */
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@ -198,34 +201,61 @@ static void mpcore_rirq_set_irq(void *opaque, int irq, int level)
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}
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}
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static int realview_mpcore_init(SysBusDevice *sbd)
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static void realview_mpcore_realize(DeviceState *dev, Error **errp)
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{
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DeviceState *dev = DEVICE(sbd);
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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mpcore_rirq_state *s = REALVIEW_MPCORE_RIRQ(dev);
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DeviceState *priv = DEVICE(&s->priv);
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DeviceState *gic;
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DeviceState *priv;
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SysBusDevice *gicbusdev;
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Error *err = NULL;
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int n;
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int i;
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priv = qdev_create(NULL, TYPE_ARM11MPCORE_PRIV);
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qdev_prop_set_uint32(priv, "num-cpu", s->num_cpu);
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qdev_init_nofail(priv);
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s->priv = SYS_BUS_DEVICE(priv);
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sysbus_pass_irq(sbd, s->priv);
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object_property_set_bool(OBJECT(&s->priv), true, "realized", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->priv));
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for (i = 0; i < 32; i++) {
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s->cpuic[i] = qdev_get_gpio_in(priv, i);
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}
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/* ??? IRQ routing is hardcoded to "normal" mode. */
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for (n = 0; n < 4; n++) {
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gic = sysbus_create_simple("realview_gic", 0x10040000 + n * 0x10000,
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s->cpuic[10 + n]);
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object_property_set_bool(OBJECT(&s->gic[n]), true, "realized", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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gic = DEVICE(&s->gic[n]);
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gicbusdev = SYS_BUS_DEVICE(&s->gic[n]);
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sysbus_mmio_map(gicbusdev, 0, 0x10040000 + n * 0x10000);
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sysbus_connect_irq(gicbusdev, 0, s->cpuic[10 + n]);
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for (i = 0; i < 64; i++) {
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s->rvic[n][i] = qdev_get_gpio_in(gic, i);
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}
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}
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qdev_init_gpio_in(dev, mpcore_rirq_set_irq, 64);
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sysbus_init_mmio(sbd, sysbus_mmio_get_region(s->priv, 0));
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return 0;
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}
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static void mpcore_rirq_init(Object *obj)
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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mpcore_rirq_state *s = REALVIEW_MPCORE_RIRQ(obj);
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SysBusDevice *privbusdev;
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int i;
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object_initialize(&s->priv, sizeof(s->priv), TYPE_ARM11MPCORE_PRIV);
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qdev_set_parent_bus(DEVICE(&s->priv), sysbus_get_default());
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privbusdev = SYS_BUS_DEVICE(&s->priv);
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sysbus_init_mmio(sbd, sysbus_mmio_get_region(privbusdev, 0));
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for (i = 0; i < 4; i++) {
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object_initialize(&s->gic[i], sizeof(s->gic[i]), TYPE_REALVIEW_GIC);
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qdev_set_parent_bus(DEVICE(&s->gic[i]), sysbus_get_default());
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}
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}
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static Property mpcore_rirq_properties[] = {
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@ -236,9 +266,8 @@ static Property mpcore_rirq_properties[] = {
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static void mpcore_rirq_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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k->init = realview_mpcore_init;
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dc->realize = realview_mpcore_realize;
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dc->props = mpcore_rirq_properties;
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}
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@ -246,6 +275,7 @@ static const TypeInfo mpcore_rirq_info = {
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.name = TYPE_REALVIEW_MPCORE_RIRQ,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(mpcore_rirq_state),
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.instance_init = mpcore_rirq_init,
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.class_init = mpcore_rirq_class_init,
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};
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