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i386: Simplify CPUID_8000_001E for AMD
apic_id contains all the information required to build CPUID_8000_001E. core_id and node_id is already part of apic_id generated by x86_topo_ids_from_apicid. Also remove the restriction on number bits on core_id and node_id. Remove all the hardcoded values and replace with generalized fields. Refer the Processor Programming Reference (PPR) documentation available from the bugzilla Link below. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Pankaj Gupta <pankaj.gupta.linux@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Message-Id: <159897585257.30750.5815593918927986935.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
Babu Moger
Eduardo Habkost
parent
2f084d1e1d
commit
31ada106d8
@ -338,62 +338,6 @@ static void encode_cache_cpuid80000006(CPUCacheInfo *l2,
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}
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}
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}
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}
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/*
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* Definitions used for building CPUID Leaf 0x8000001D and 0x8000001E
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* Please refer to the AMD64 Architecture Programmer’s Manual Volume 3.
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* Define the constants to build the cpu topology. Right now, TOPOEXT
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* feature is enabled only on EPYC. So, these constants are based on
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* EPYC supported configurations. We may need to handle the cases if
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* these values change in future.
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*/
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/* Maximum core complexes in a node */
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#define MAX_CCX 2
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/* Maximum cores in a core complex */
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#define MAX_CORES_IN_CCX 4
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/* Maximum cores in a node */
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#define MAX_CORES_IN_NODE 8
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/* Maximum nodes in a socket */
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#define MAX_NODES_PER_SOCKET 4
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/*
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* Figure out the number of nodes required to build this config.
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* Max cores in a node is 8
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*/
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static int nodes_in_socket(int nr_cores)
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{
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int nodes;
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nodes = DIV_ROUND_UP(nr_cores, MAX_CORES_IN_NODE);
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/* Hardware does not support config with 3 nodes, return 4 in that case */
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return (nodes == 3) ? 4 : nodes;
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}
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/*
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* Decide the number of cores in a core complex with the given nr_cores using
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* following set constants MAX_CCX, MAX_CORES_IN_CCX, MAX_CORES_IN_NODE and
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* MAX_NODES_PER_SOCKET. Maintain symmetry as much as possible
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* L3 cache is shared across all cores in a core complex. So, this will also
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* tell us how many cores are sharing the L3 cache.
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*/
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static int cores_in_core_complex(int nr_cores)
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{
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int nodes;
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/* Check if we can fit all the cores in one core complex */
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if (nr_cores <= MAX_CORES_IN_CCX) {
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return nr_cores;
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}
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/* Get the number of nodes required to build this config */
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nodes = nodes_in_socket(nr_cores);
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/*
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* Divide the cores accros all the core complexes
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* Return rounded up value
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*/
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return DIV_ROUND_UP(nr_cores, nodes * MAX_CCX);
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}
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/* Encode cache info for CPUID[8000001D] */
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/* Encode cache info for CPUID[8000001D] */
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static void encode_cache_cpuid8000001d(CPUCacheInfo *cache,
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static void encode_cache_cpuid8000001d(CPUCacheInfo *cache,
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X86CPUTopoInfo *topo_info,
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X86CPUTopoInfo *topo_info,
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@ -432,107 +376,58 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *cache,
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(cache->complex_indexing ? CACHE_COMPLEX_IDX : 0);
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(cache->complex_indexing ? CACHE_COMPLEX_IDX : 0);
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}
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}
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/* Data structure to hold the configuration info for a given core index */
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struct core_topology {
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/* core complex id of the current core index */
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int ccx_id;
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/*
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* Adjusted core index for this core in the topology
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* This can be 0,1,2,3 with max 4 cores in a core complex
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*/
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int core_id;
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/* Node id for this core index */
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int node_id;
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/* Number of nodes in this config */
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int num_nodes;
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};
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/*
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* Build the configuration closely match the EPYC hardware. Using the EPYC
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* hardware configuration values (MAX_CCX, MAX_CORES_IN_CCX, MAX_CORES_IN_NODE)
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* right now. This could change in future.
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* nr_cores : Total number of cores in the config
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* core_id : Core index of the current CPU
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* topo : Data structure to hold all the config info for this core index
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*/
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static void build_core_topology(int nr_cores, int core_id,
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struct core_topology *topo)
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{
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int nodes, cores_in_ccx;
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/* First get the number of nodes required */
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nodes = nodes_in_socket(nr_cores);
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cores_in_ccx = cores_in_core_complex(nr_cores);
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topo->node_id = core_id / (cores_in_ccx * MAX_CCX);
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topo->ccx_id = (core_id % (cores_in_ccx * MAX_CCX)) / cores_in_ccx;
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topo->core_id = core_id % cores_in_ccx;
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topo->num_nodes = nodes;
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}
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/* Encode cache info for CPUID[8000001E] */
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/* Encode cache info for CPUID[8000001E] */
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static void encode_topo_cpuid8000001e(CPUState *cs, X86CPU *cpu,
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static void encode_topo_cpuid8000001e(X86CPU *cpu, X86CPUTopoInfo *topo_info,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx)
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uint32_t *ecx, uint32_t *edx)
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{
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{
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struct core_topology topo = {0};
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X86CPUTopoIDs topo_ids;
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unsigned long nodes;
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int shift;
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x86_topo_ids_from_apicid(cpu->apic_id, topo_info, &topo_ids);
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build_core_topology(cs->nr_cores, cpu->core_id, &topo);
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*eax = cpu->apic_id;
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*eax = cpu->apic_id;
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/*
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/*
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* CPUID_Fn8000001E_EBX
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* CPUID_Fn8000001E_EBX [Core Identifiers] (CoreId)
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* 31:16 Reserved
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* Read-only. Reset: 0000_XXXXh.
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* 15:8 Threads per core (The number of threads per core is
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* See Core::X86::Cpuid::ExtApicId.
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* Threads per core + 1)
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* Core::X86::Cpuid::CoreId_lthree[1:0]_core[3:0]_thread[1:0];
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* 7:0 Core id (see bit decoding below)
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* Bits Description
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* SMT:
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* 31:16 Reserved.
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* 4:3 node id
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* 15:8 ThreadsPerCore: threads per core. Read-only. Reset: XXh.
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* 2 Core complex id
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* The number of threads per core is ThreadsPerCore+1.
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* 1:0 Core id
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* 7:0 CoreId: core ID. Read-only. Reset: XXh.
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* Non SMT:
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*
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* 5:4 node id
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* NOTE: CoreId is already part of apic_id. Just use it. We can
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* 3 Core complex id
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* use all the 8 bits to represent the core_id here.
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* 1:0 Core id
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*/
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*/
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if (cs->nr_threads - 1) {
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*ebx = ((topo_info->threads_per_core - 1) << 8) | (topo_ids.core_id & 0xFF);
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*ebx = ((cs->nr_threads - 1) << 8) | (topo.node_id << 3) |
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(topo.ccx_id << 2) | topo.core_id;
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} else {
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*ebx = (topo.node_id << 4) | (topo.ccx_id << 3) | topo.core_id;
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}
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/*
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/*
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* CPUID_Fn8000001E_ECX
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* CPUID_Fn8000001E_ECX [Node Identifiers] (NodeId)
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* 31:11 Reserved
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* Read-only. Reset: 0000_0XXXh.
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* 10:8 Nodes per processor (Nodes per processor is number of nodes + 1)
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* Core::X86::Cpuid::NodeId_lthree[1:0]_core[3:0]_thread[1:0];
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* 7:0 Node id (see bit decoding below)
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* Bits Description
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* 2 Socket id
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* 31:11 Reserved.
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* 1:0 Node id
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* 10:8 NodesPerProcessor: Node per processor. Read-only. Reset: XXXb.
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* ValidValues:
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* Value Description
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* 000b 1 node per processor.
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* 001b 2 nodes per processor.
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* 010b Reserved.
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* 011b 4 nodes per processor.
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* 111b-100b Reserved.
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* 7:0 NodeId: Node ID. Read-only. Reset: XXh.
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*
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* NOTE: Hardware reserves 3 bits for number of nodes per processor.
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* But users can create more nodes than the actual hardware can
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* support. To genaralize we can use all the upper 8 bits for nodes.
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* NodeId is combination of node and socket_id which is already decoded
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* in apic_id. Just use it by shifting.
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*/
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*/
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if (topo.num_nodes <= 4) {
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*ecx = ((topo_info->dies_per_pkg - 1) << 8) |
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*ecx = ((topo.num_nodes - 1) << 8) | (cpu->socket_id << 2) |
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((cpu->apic_id >> apicid_die_offset(topo_info)) & 0xFF);
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topo.node_id;
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} else {
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/*
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* Node id fix up. Actual hardware supports up to 4 nodes. But with
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* more than 32 cores, we may end up with more than 4 nodes.
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* Node id is a combination of socket id and node id. Only requirement
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* here is that this number should be unique accross the system.
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* Shift the socket id to accommodate more nodes. We dont expect both
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* socket id and node id to be big number at the same time. This is not
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* an ideal config but we need to to support it. Max nodes we can have
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* is 32 (255/8) with 8 cores per node and 255 max cores. We only need
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* 5 bits for nodes. Find the left most set bit to represent the total
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* number of nodes. find_last_bit returns last set bit(0 based). Left
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* shift(+1) the socket id to represent all the nodes.
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*/
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nodes = topo.num_nodes - 1;
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shift = find_last_bit(&nodes, 8);
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*ecx = ((topo.num_nodes - 1) << 8) | (cpu->socket_id << (shift + 1)) |
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topo.node_id;
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}
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*edx = 0;
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*edx = 0;
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}
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}
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@ -6018,7 +5913,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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break;
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break;
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case 0x8000001E:
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case 0x8000001E:
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assert(cpu->core_id <= 255);
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assert(cpu->core_id <= 255);
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encode_topo_cpuid8000001e(cs, cpu,
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encode_topo_cpuid8000001e(cpu, &topo_info,
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eax, ebx, ecx, edx);
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eax, ebx, ecx, edx);
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break;
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break;
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case 0xC0000000:
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case 0xC0000000:
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