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Use libgcc __clear_cache to clean icache, when available.

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Calling the clear cache syscall directly generates an illegal instruction 
on some (armv4) kernels.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5843 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
balrog 2008-12-01 02:02:37 +00:00
parent 80fe30ed34
commit 3233f0d463
2 changed files with 13 additions and 0 deletions
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8
exec-all.h
View File

@ -205,18 +205,26 @@ static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr
#elif defined(__arm__)
static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
{
#if QEMU_GNUC_PREREQ(4, 1)
void __clear_cache(char *beg, char *end);
#else
register unsigned long _beg __asm ("a1");
register unsigned long _end __asm ("a2");
register unsigned long _flg __asm ("a3");
#endif
/* we could use a ldr pc, [pc, #-4] kind of branch and avoid the flush */
*(uint32_t *)jmp_addr |= ((addr - (jmp_addr + 8)) >> 2) & 0xffffff;
#if QEMU_GNUC_PREREQ(4, 1)
__clear_cache((char *) jmp_addr, (char *) jmp_addr + 4);
#else
/* flush icache */
_beg = jmp_addr;
_end = jmp_addr + 4;
_flg = 0;
__asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
#endif
}
#endif

5
tcg/arm/tcg-target.h
View File

@ -69,8 +69,13 @@ enum {
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
#if QEMU_GNUC_PREREQ(4, 1)
void __clear_cache(char *beg, char *end);
__clear_cache((char *) start, (char *) stop);
#else
register unsigned long _beg __asm ("a1") = start;
register unsigned long _end __asm ("a2") = stop;
register unsigned long _flg __asm ("a3") = 0;
__asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
#endif
}