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qdev/isa: convert real time clock
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
parent
11d23c352d
commit
32e0c8260d
@ -63,10 +63,11 @@
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#define REG_C_AF 0x20
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struct RTCState {
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ISADevice dev;
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uint8_t cmos_data[128];
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uint8_t cmos_index;
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struct tm current_tm;
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int base_year;
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int32_t base_year;
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qemu_irq irq;
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qemu_irq sqw_irq;
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int it_shift;
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@ -589,20 +590,19 @@ static void rtc_reset(void *opaque)
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#endif
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}
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RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year)
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static int rtc_initfn(ISADevice *dev)
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{
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RTCState *s;
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RTCState *s = DO_UPCAST(RTCState, dev, dev);
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int base = 0x70;
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int isairq = 8;
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s = qemu_mallocz(sizeof(RTCState));
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isa_init_irq(dev, &s->irq, isairq);
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s->irq = irq;
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s->sqw_irq = sqw_irq;
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s->cmos_data[RTC_REG_A] = 0x26;
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s->cmos_data[RTC_REG_B] = 0x02;
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s->cmos_data[RTC_REG_C] = 0x00;
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s->cmos_data[RTC_REG_D] = 0x80;
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s->base_year = base_year;
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rtc_set_date_from_host(s);
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s->periodic_timer = qemu_new_timer(vm_clock,
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@ -628,15 +628,36 @@ RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year)
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register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
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#endif
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qemu_register_reset(rtc_reset, s);
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return s;
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return 0;
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}
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RTCState *rtc_init(int base, qemu_irq irq, int base_year)
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RTCState *rtc_init(int base_year)
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{
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return rtc_init_sqw(base, irq, NULL, base_year);
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ISADevice *dev;
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dev = isa_create("mc146818rtc");
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qdev_prop_set_int32(&dev->qdev, "base_year", base_year);
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qdev_init(&dev->qdev);
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return DO_UPCAST(RTCState, dev, dev);
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}
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static ISADeviceInfo mc146818rtc_info = {
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.qdev.name = "mc146818rtc",
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.qdev.size = sizeof(RTCState),
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.qdev.no_user = 1,
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.init = rtc_initfn,
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.qdev.props = (Property[]) {
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DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980),
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DEFINE_PROP_END_OF_LIST(),
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}
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};
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static void mc146818rtc_register(void)
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{
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isa_qdev_register(&mc146818rtc_info);
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}
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device_init(mc146818rtc_register)
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/* Memory mapped interface */
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static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr)
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{
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@ -241,7 +241,7 @@ void mips_jazz_init (ram_addr_t ram_size,
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fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds);
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/* Real time clock */
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rtc_init(0x70, i8259[8], 1980);
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rtc_init(1980);
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s_rtc = cpu_register_io_memory(rtc_read, rtc_write, env);
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cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
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@ -923,7 +923,7 @@ void mips_malta_init (ram_addr_t ram_size,
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/* Super I/O */
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isa_dev = isa_create_simple("i8042");
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rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000);
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rtc_state = rtc_init(2000);
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serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]);
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serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]);
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if (parallel_hds[0])
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@ -244,7 +244,7 @@ void mips_r4k_init (ram_addr_t ram_size,
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isa_bus_new(NULL);
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isa_bus_irqs(i8259);
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rtc_state = rtc_init(0x70, i8259[8], 2000);
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rtc_state = rtc_init(2000);
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/* Register 64 KB of ISA IO space at 0x14000000 */
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isa_mmio_init(0x14000000, 0x00010000);
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2
hw/pc.c
2
hw/pc.c
@ -1313,7 +1313,7 @@ static void pc_init1(ram_addr_t ram_size,
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}
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}
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rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000);
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rtc_state = rtc_init(2000);
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qemu_register_boot_set(pc_boot_set, rtc_state);
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3
hw/pc.h
3
hw/pc.h
@ -81,8 +81,7 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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typedef struct RTCState RTCState;
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RTCState *rtc_init(int base, qemu_irq irq, int base_year);
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RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year);
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RTCState *rtc_init(int base_year);
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RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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int base_year);
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void rtc_set_memory(RTCState *s, int addr, int val);
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@ -680,7 +680,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
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pci_vga_init(pci_bus, 0, 0);
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// openpic = openpic_init(0x00000000, 0xF0000000, 1);
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// pit = pit_init(0x40, i8259[0]);
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rtc_init(0x70, i8259[8], 2000);
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rtc_init(2000);
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serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);
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nb_nics1 = nb_nics;
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