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target/ppc: Style fixes for translate/vsx-impl.inc.c

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Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
This commit is contained in:
David Gibson 2019-03-21 23:47:10 +11:00
parent f895d2c820
commit 34b2300cbb
1 changed files with 8 additions and 7 deletions
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15
target/ppc/translate/vsx-impl.inc.c
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@ -751,7 +751,7 @@ static void gen_xxpermdi(DisasContext *ctx)
#define SGN_MASK_SP 0x8000000080000000ull #define SGN_MASK_SP 0x8000000080000000ull
#define VSX_SCALAR_MOVE(name, op, sgn_mask) \ #define VSX_SCALAR_MOVE(name, op, sgn_mask) \
static void glue(gen_, name)(DisasContext * ctx) \ static void glue(gen_, name)(DisasContext *ctx) \
{ \ { \
TCGv_i64 xb, sgm; \ TCGv_i64 xb, sgm; \
if (unlikely(!ctx->vsx_enabled)) { \ if (unlikely(!ctx->vsx_enabled)) { \
@ -848,7 +848,7 @@ VSX_SCALAR_MOVE_QP(xsnegqp, OP_NEG, SGN_MASK_DP)
VSX_SCALAR_MOVE_QP(xscpsgnqp, OP_CPSGN, SGN_MASK_DP) VSX_SCALAR_MOVE_QP(xscpsgnqp, OP_CPSGN, SGN_MASK_DP)
#define VSX_VECTOR_MOVE(name, op, sgn_mask) \ #define VSX_VECTOR_MOVE(name, op, sgn_mask) \
static void glue(gen_, name)(DisasContext * ctx) \ static void glue(gen_, name)(DisasContext *ctx) \
{ \ { \
TCGv_i64 xbh, xbl, sgm; \ TCGv_i64 xbh, xbl, sgm; \
if (unlikely(!ctx->vsx_enabled)) { \ if (unlikely(!ctx->vsx_enabled)) { \
@ -910,7 +910,7 @@ VSX_VECTOR_MOVE(xvnegsp, OP_NEG, SGN_MASK_SP)
VSX_VECTOR_MOVE(xvcpsgnsp, OP_CPSGN, SGN_MASK_SP) VSX_VECTOR_MOVE(xvcpsgnsp, OP_CPSGN, SGN_MASK_SP)
#define GEN_VSX_HELPER_2(name, op1, op2, inval, type) \ #define GEN_VSX_HELPER_2(name, op1, op2, inval, type) \
static void gen_##name(DisasContext * ctx) \ static void gen_##name(DisasContext *ctx) \
{ \ { \
TCGv_i32 opc; \ TCGv_i32 opc; \
if (unlikely(!ctx->vsx_enabled)) { \ if (unlikely(!ctx->vsx_enabled)) { \
@ -923,7 +923,7 @@ static void gen_##name(DisasContext * ctx) \
} }
#define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \ #define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \
static void gen_##name(DisasContext * ctx) \ static void gen_##name(DisasContext *ctx) \
{ \ { \
TCGv_i64 t0; \ TCGv_i64 t0; \
TCGv_i64 t1; \ TCGv_i64 t1; \
@ -1230,7 +1230,7 @@ static void gen_xxbrw(DisasContext *ctx)
} }
#define VSX_LOGICAL(name, vece, tcg_op) \ #define VSX_LOGICAL(name, vece, tcg_op) \
static void glue(gen_, name)(DisasContext * ctx) \ static void glue(gen_, name)(DisasContext *ctx) \
{ \ { \
if (unlikely(!ctx->vsx_enabled)) { \ if (unlikely(!ctx->vsx_enabled)) { \
gen_exception(ctx, POWERPC_EXCP_VSXU); \ gen_exception(ctx, POWERPC_EXCP_VSXU); \
@ -1251,7 +1251,7 @@ VSX_LOGICAL(xxlnand, MO_64, tcg_gen_gvec_nand)
VSX_LOGICAL(xxlorc, MO_64, tcg_gen_gvec_orc) VSX_LOGICAL(xxlorc, MO_64, tcg_gen_gvec_orc)
#define VSX_XXMRG(name, high) \ #define VSX_XXMRG(name, high) \
static void glue(gen_, name)(DisasContext * ctx) \ static void glue(gen_, name)(DisasContext *ctx) \
{ \ { \
TCGv_i64 a0, a1, b0, b1, tmp; \ TCGv_i64 a0, a1, b0, b1, tmp; \
if (unlikely(!ctx->vsx_enabled)) { \ if (unlikely(!ctx->vsx_enabled)) { \
@ -1444,7 +1444,8 @@ static void gen_##name(DisasContext *ctx) \
xb = tcg_const_tl(xB(ctx->opcode)); \ xb = tcg_const_tl(xB(ctx->opcode)); \
t0 = tcg_temp_new_i32(); \ t0 = tcg_temp_new_i32(); \
t1 = tcg_temp_new_i64(); \ t1 = tcg_temp_new_i64(); \
/* uimm > 15 out of bound and for \ /* \
* uimm > 15 out of bound and for \
* uimm > 12 handle as per hardware in helper \ * uimm > 12 handle as per hardware in helper \
*/ \ */ \
if (uimm > 15) { \ if (uimm > 15) { \