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target-i386: SSE4.1: fix pinsrb instruction

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gen_op_mov_TN_reg() loads the value in cpu_T[0], so this temporary should
be used instead of cpu_tmp0.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2013-03-26 19:56:01 +01:00
parent c7b4c36714
commit 34c6addd4b
1 changed files with 2 additions and 2 deletions
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4
target-i386/translate.c
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@ -4404,9 +4404,9 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
if (mod == 3)
gen_op_mov_TN_reg(OT_LONG, 0, rm);
else
tcg_gen_qemu_ld8u(cpu_tmp0, cpu_A0,
tcg_gen_qemu_ld8u(cpu_T[0], cpu_A0,
(s->mem_index >> 2) - 1);
tcg_gen_st8_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State,
tcg_gen_st8_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,
xmm_regs[reg].XMM_B(val & 15)));
break;
case 0x21: /* insertps */