target-arm: Adjust id_aa64pfr0 when has_el3 CPU property disabled

Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1429669112-29835-1-git-send-email-serge.fdrv@gmail.com
Reviewed-by: Greg Bellows <greg.bellows@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Sergey Fedorov 2015-04-26 16:49:26 +01:00 committed by Peter Maydell
parent 7ebd5f2e03
commit 3d5c84ff21

View File

@ -524,9 +524,10 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
unset_feature(env, ARM_FEATURE_EL3); unset_feature(env, ARM_FEATURE_EL3);
/* Disable the security extension feature bits in the processor feature /* Disable the security extension feature bits in the processor feature
* register as well. This is id_pfr1[7:4]. * registers as well. These are id_pfr1[7:4] and id_aa64pfr0[15:12].
*/ */
cpu->id_pfr1 &= ~0xf0; cpu->id_pfr1 &= ~0xf0;
cpu->id_aa64pfr0 &= ~0xf000;
} }
register_cp_regs_for_features(cpu); register_cp_regs_for_features(cpu);