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target-arm: Adjust id_aa64pfr0 when has_el3 CPU property disabled
Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1429669112-29835-1-git-send-email-serge.fdrv@gmail.com Reviewed-by: Greg Bellows <greg.bellows@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -524,9 +524,10 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
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unset_feature(env, ARM_FEATURE_EL3);
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unset_feature(env, ARM_FEATURE_EL3);
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/* Disable the security extension feature bits in the processor feature
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/* Disable the security extension feature bits in the processor feature
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* register as well. This is id_pfr1[7:4].
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* registers as well. These are id_pfr1[7:4] and id_aa64pfr0[15:12].
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*/
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*/
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cpu->id_pfr1 &= ~0xf0;
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cpu->id_pfr1 &= ~0xf0;
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cpu->id_aa64pfr0 &= ~0xf000;
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}
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}
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register_cp_regs_for_features(cpu);
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register_cp_regs_for_features(cpu);
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