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target-arm: add missing PSCI constants needed for PSCI emulation
This adds some PSCI function IDs and symbolic return codes that are needed to implement PSCI emulation in TCG mode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1412865028-17725-4-git-send-email-peter.maydell@linaro.org
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@ -59,14 +59,21 @@ MISMATCH_CHECK(QEMU_PSCI_0_1_FN_MIGRATE, KVM_PSCI_FN_MIGRATE)
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(QEMU_PSCI_0_2_FN_BASE + QEMU_PSCI_0_2_64BIT)
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#define QEMU_PSCI_0_2_FN64(n) (QEMU_PSCI_0_2_FN64_BASE + (n))
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#define QEMU_PSCI_0_2_FN_PSCI_VERSION QEMU_PSCI_0_2_FN(0)
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#define QEMU_PSCI_0_2_FN_CPU_SUSPEND QEMU_PSCI_0_2_FN(1)
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#define QEMU_PSCI_0_2_FN_CPU_OFF QEMU_PSCI_0_2_FN(2)
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#define QEMU_PSCI_0_2_FN_CPU_ON QEMU_PSCI_0_2_FN(3)
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#define QEMU_PSCI_0_2_FN_AFFINITY_INFO QEMU_PSCI_0_2_FN(4)
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#define QEMU_PSCI_0_2_FN_MIGRATE QEMU_PSCI_0_2_FN(5)
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#define QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE QEMU_PSCI_0_2_FN(6)
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#define QEMU_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU QEMU_PSCI_0_2_FN(7)
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#define QEMU_PSCI_0_2_FN_SYSTEM_OFF QEMU_PSCI_0_2_FN(8)
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#define QEMU_PSCI_0_2_FN_SYSTEM_RESET QEMU_PSCI_0_2_FN(9)
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#define QEMU_PSCI_0_2_FN64_CPU_SUSPEND QEMU_PSCI_0_2_FN64(1)
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#define QEMU_PSCI_0_2_FN64_CPU_OFF QEMU_PSCI_0_2_FN64(2)
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#define QEMU_PSCI_0_2_FN64_CPU_ON QEMU_PSCI_0_2_FN64(3)
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#define QEMU_PSCI_0_2_FN64_AFFINITY_INFO QEMU_PSCI_0_2_FN64(4)
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#define QEMU_PSCI_0_2_FN64_MIGRATE QEMU_PSCI_0_2_FN64(5)
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MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_SUSPEND, PSCI_0_2_FN_CPU_SUSPEND)
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@ -77,6 +84,39 @@ MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_SUSPEND, PSCI_0_2_FN64_CPU_SUSPEND)
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MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_ON, PSCI_0_2_FN64_CPU_ON)
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MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_MIGRATE, PSCI_0_2_FN64_MIGRATE)
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/* PSCI v0.2 return values used by TCG emulation of PSCI */
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/* No Trusted OS migration to worry about when offlining CPUs */
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#define QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED 2
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/* We implement version 0.2 only */
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#define QEMU_PSCI_0_2_RET_VERSION_0_2 2
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MISMATCH_CHECK(QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED, PSCI_0_2_TOS_MP)
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MISMATCH_CHECK(QEMU_PSCI_0_2_RET_VERSION_0_2,
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(PSCI_VERSION_MAJOR(0) | PSCI_VERSION_MINOR(2)))
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/* PSCI return values (inclusive of all PSCI versions) */
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#define QEMU_PSCI_RET_SUCCESS 0
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#define QEMU_PSCI_RET_NOT_SUPPORTED -1
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#define QEMU_PSCI_RET_INVALID_PARAMS -2
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#define QEMU_PSCI_RET_DENIED -3
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#define QEMU_PSCI_RET_ALREADY_ON -4
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#define QEMU_PSCI_RET_ON_PENDING -5
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#define QEMU_PSCI_RET_INTERNAL_FAILURE -6
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#define QEMU_PSCI_RET_NOT_PRESENT -7
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#define QEMU_PSCI_RET_DISABLED -8
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MISMATCH_CHECK(QEMU_PSCI_RET_SUCCESS, PSCI_RET_SUCCESS)
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MISMATCH_CHECK(QEMU_PSCI_RET_NOT_SUPPORTED, PSCI_RET_NOT_SUPPORTED)
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MISMATCH_CHECK(QEMU_PSCI_RET_INVALID_PARAMS, PSCI_RET_INVALID_PARAMS)
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MISMATCH_CHECK(QEMU_PSCI_RET_DENIED, PSCI_RET_DENIED)
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MISMATCH_CHECK(QEMU_PSCI_RET_ALREADY_ON, PSCI_RET_ALREADY_ON)
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MISMATCH_CHECK(QEMU_PSCI_RET_ON_PENDING, PSCI_RET_ON_PENDING)
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MISMATCH_CHECK(QEMU_PSCI_RET_INTERNAL_FAILURE, PSCI_RET_INTERNAL_FAILURE)
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MISMATCH_CHECK(QEMU_PSCI_RET_NOT_PRESENT, PSCI_RET_NOT_PRESENT)
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MISMATCH_CHECK(QEMU_PSCI_RET_DISABLED, PSCI_RET_DISABLED)
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/* Note that KVM uses overlapping values for AArch32 and AArch64
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* target CPU numbers. AArch32 targets:
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*/
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