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q35: update lpc pci config space according to configured devices
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
parent
c177684c75
commit
3f5bc9e8af
@ -51,6 +51,7 @@ typedef struct ICH9LPCState {
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/* isa bus */
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ISABus *isa_bus;
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MemoryRegion rbca_mem;
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Notifier machine_ready;
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qemu_irq *pic;
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qemu_irq *ioapic;
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@ -60,6 +60,7 @@
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#include "pam.h"
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#include "pci_internals.h"
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#include "exec-memory.h"
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#include "sysemu.h"
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static int ich9_lpc_sci_irq(ICH9LPCState *lpc);
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@ -456,6 +457,30 @@ static const MemoryRegionOps rbca_mmio_ops = {
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void ich9_lpc_machine_ready(Notifier *n, void *opaque)
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{
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ICH9LPCState *s = container_of(n, ICH9LPCState, machine_ready);
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uint8_t *pci_conf;
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pci_conf = s->d.config;
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if (isa_is_ioport_assigned(0x3f8)) {
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/* com1 */
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pci_conf[0x82] |= 0x01;
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}
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if (isa_is_ioport_assigned(0x2f8)) {
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/* com2 */
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pci_conf[0x82] |= 0x02;
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}
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if (isa_is_ioport_assigned(0x378)) {
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/* lpt */
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pci_conf[0x82] |= 0x04;
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}
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if (isa_is_ioport_assigned(0x3f0)) {
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/* floppy */
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pci_conf[0x82] |= 0x08;
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}
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}
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static int ich9_lpc_initfn(PCIDevice *d)
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{
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ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
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@ -473,6 +498,10 @@ static int ich9_lpc_initfn(PCIDevice *d)
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ich9_cc_init(lpc);
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apm_init(&lpc->apm, ich9_apm_ctrl_changed, lpc);
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lpc->machine_ready.notify = ich9_lpc_machine_ready;
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qemu_add_machine_init_done_notifier(&lpc->machine_ready);
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return 0;
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}
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@ -77,18 +77,6 @@ static int ich9_smbus_initfn(PCIDevice *d)
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/* TODO? D31IP.SMIP in chipset configuration space */
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pci_config_set_interrupt_pin(d->config, 0x01); /* interrupt pin 1 */
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pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
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/*
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* update parameters based on
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* paralell_hds[0]
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* serial_hds[0]
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* serial_hds[0]
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* fdc
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*
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* Is there any OS that depends on them?
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*/
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pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
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/* TODO bar0, bar1: 64bit BAR support*/
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