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target-mips: fix xtlb exception for loongson
Loongson 2E and 2F use the same entry for xtlb and tlb exception, at offset 0x000. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -491,7 +491,8 @@ void do_interrupt (CPUState *env)
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int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0;
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int KX = (env->CP0_Status & (1 << CP0St_KX)) != 0;
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if ((R == 0 && UX) || (R == 1 && SX) || (R == 3 && KX))
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if (((R == 0 && UX) || (R == 1 && SX) || (R == 3 && KX)) &&
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(!(env->insn_flags & (INSN_LOONGSON2E | INSN_LOONGSON2F))))
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offset = 0x080;
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else
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#endif
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@ -507,7 +508,8 @@ void do_interrupt (CPUState *env)
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int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0;
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int KX = (env->CP0_Status & (1 << CP0St_KX)) != 0;
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if ((R == 0 && UX) || (R == 1 && SX) || (R == 3 && KX))
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if (((R == 0 && UX) || (R == 1 && SX) || (R == 3 && KX)) &&
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(!(env->insn_flags & (INSN_LOONGSON2E | INSN_LOONGSON2F))))
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offset = 0x080;
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else
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#endif
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