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target/arm: Refactor disas_simd_indexed size checks

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The integer size check was already outside of the opcode switch;
move the floating-point size check outside as well.  Unify the
size vs index adjustment between fp and integer paths.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180228193125.20577-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2018-03-02 10:45:41 +00:00 committed by Peter Maydell
parent 5f81b1de43
commit 449f264b17
1 changed files with 32 additions and 33 deletions
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65
target/arm/translate-a64.c
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@ -11820,10 +11820,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x05: /* FMLS */ case 0x05: /* FMLS */
case 0x09: /* FMUL */ case 0x09: /* FMUL */
case 0x19: /* FMULX */ case 0x19: /* FMULX */
if (size == 1) {
unallocated_encoding(s);
return;
}
is_fp = true; is_fp = true;
break; break;
default: default:
@ -11834,45 +11830,48 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
if (is_fp) { if (is_fp) {
/* convert insn encoded size to TCGMemOp size */ /* convert insn encoded size to TCGMemOp size */
switch (size) { switch (size) {
case 2: /* single precision */ case 0: /* half-precision */
size = MO_32; if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
index = h << 1 | l;
rm |= (m << 4);
break;
case 3: /* double precision */
size = MO_64;
if (l || !is_q) {
unallocated_encoding(s); unallocated_encoding(s);
return; return;
} }
index = h;
rm |= (m << 4);
break;
case 0: /* half precision */
size = MO_16; size = MO_16;
index = h << 2 | l << 1 | m;
is_fp16 = true;
if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
break;
}
/* fallthru */
default: /* unallocated */
unallocated_encoding(s);
return;
}
} else {
switch (size) {
case 1:
index = h << 2 | l << 1 | m;
break; break;
case 2: case MO_32: /* single precision */
index = h << 1 | l; case MO_64: /* double precision */
rm |= (m << 4);
break; break;
default: default:
unallocated_encoding(s); unallocated_encoding(s);
return; return;
} }
} else {
switch (size) {
case MO_8:
case MO_64:
unallocated_encoding(s);
return;
}
}
/* Given TCGMemOp size, adjust register and indexing. */
switch (size) {
case MO_16:
index = h << 2 | l << 1 | m;
break;
case MO_32:
index = h << 1 | l;
rm |= m << 4;
break;
case MO_64:
if (l || !is_q) {
unallocated_encoding(s);
return;
}
index = h;
rm |= m << 4;
break;
default:
g_assert_not_reached();
} }
if (!fp_access_check(s)) { if (!fp_access_check(s)) {