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Fix malta emulation for 64bit qemu.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2355 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-01-24 22:00:13 +00:00
parent 6070dd07e9
commit 44cbbf18b9
2 changed files with 21 additions and 14 deletions
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27
hw/mips_malta.c
View File

@ -24,16 +24,21 @@
#include "vl.h" #include "vl.h"
#define BIOS_FILENAME "mips_bios.bin" #ifdef TARGET_WORDS_BIGENDIAN
#ifdef MIPS_HAS_MIPS64 #define BIOS_FILENAME "mips_bios.bin"
#define INITRD_LOAD_ADDR (uint64_t)0x80800000
#define ENVP_ADDR (uint64_t)0x80002000
#else #else
#define INITRD_LOAD_ADDR (uint32_t)0x80800000 #define BIOS_FILENAME "mipsel_bios.bin"
#define ENVP_ADDR (uint32_t)0x80002000
#endif #endif
#define VIRT_TO_PHYS_ADDEND (-((uint64_t)(uint32_t)0x80000000)) #ifdef MIPS_HAS_MIPS64
#define INITRD_LOAD_ADDR (int64_t)0x80800000
#define ENVP_ADDR (int64_t)0x80002000
#else
#define INITRD_LOAD_ADDR (int32_t)0x80800000
#define ENVP_ADDR (int32_t)0x80002000
#endif
#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
#define ENVP_NB_ENTRIES 16 #define ENVP_NB_ENTRIES 16
#define ENVP_ENTRY_SIZE 256 #define ENVP_ENTRY_SIZE 256
@ -156,7 +161,8 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr)
default: default:
#if 0 #if 0
printf ("malta_fpga_read: Bad register offset 0x%x\n", (int)addr); printf ("malta_fpga_read: Bad register offset 0x" TLSZ "\n",
addr);
#endif #endif
break; break;
} }
@ -239,7 +245,8 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
default: default:
#if 0 #if 0
printf ("malta_fpga_write: Bad register offset 0x%x\n", (int)addr); printf ("malta_fpga_write: Bad register offset 0x" TLSZ "\n",
addr);
#endif #endif
break; break;
} }
@ -458,7 +465,7 @@ static int64_t load_kernel (CPUState *env)
/* Store command line. */ /* Store command line. */
prom_set(index++, env->kernel_filename); prom_set(index++, env->kernel_filename);
if (initrd_size > 0) if (initrd_size > 0)
prom_set(index++, "rd_start=0x%08x rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); prom_set(index++, "rd_start=0x" TLSZ " rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline);
else else
prom_set(index++, env->kernel_cmdline); prom_set(index++, env->kernel_cmdline);

8
hw/mips_r4k.c
View File

@ -14,7 +14,7 @@
#else #else
#define BIOS_FILENAME "mipsel_bios.bin" #define BIOS_FILENAME "mipsel_bios.bin"
#endif #endif
//#define BIOS_FILENAME "system.bin"
#ifdef MIPS_HAS_MIPS64 #ifdef MIPS_HAS_MIPS64
#define INITRD_LOAD_ADDR (int64_t)(int32_t)0x80800000 #define INITRD_LOAD_ADDR (int64_t)(int32_t)0x80800000
#else #else
@ -112,8 +112,8 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline); strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
} }
*(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678); *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
*(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size); *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
} }
static void main_cpu_reset(void *opaque) static void main_cpu_reset(void *opaque)
@ -159,7 +159,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
bios_size = load_image(buf, phys_ram_base + bios_offset); bios_size = load_image(buf, phys_ram_base + bios_offset);
if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
cpu_register_physical_memory((uint32_t)(0x1fc00000), cpu_register_physical_memory(0x1fc00000,
BIOS_SIZE, bios_offset | IO_MEM_ROM); BIOS_SIZE, bios_offset | IO_MEM_ROM);
} else { } else {
/* not fatal */ /* not fatal */