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hw/intc/arm_gic: Create outbound FIQ lines
Create the outbound FIQ lines from the GIC to the CPUs; these are used if the GIC has security extensions or grouping support. Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch> Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1430502643-25909-2-git-send-email-peter.maydell@linaro.org Message-id: 1429113742-8371-2-git-send-email-greg.bellows@linaro.org [PMM: added FIQ lines to kvm-arm-gic so its interface is the same; tweaked commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -790,6 +790,9 @@ void gic_init_irqs_and_distributor(GICState *s)
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for (i = 0; i < NUM_CPU(s); i++) {
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sysbus_init_irq(sbd, &s->parent_irq[i]);
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}
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for (i = 0; i < NUM_CPU(s); i++) {
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sysbus_init_irq(sbd, &s->parent_fiq[i]);
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}
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memory_region_init_io(&s->iomem, OBJECT(s), &gic_dist_ops, s,
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"gic_dist", 0x1000);
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}
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@ -554,12 +554,15 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
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*/
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i += (GIC_INTERNAL * s->num_cpu);
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qdev_init_gpio_in(dev, kvm_arm_gic_set_irq, i);
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/* We never use our outbound IRQ lines but provide them so that
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/* We never use our outbound IRQ/FIQ lines but provide them so that
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* we maintain the same interface as the non-KVM GIC.
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*/
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for (i = 0; i < s->num_cpu; i++) {
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sysbus_init_irq(sbd, &s->parent_irq[i]);
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}
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for (i = 0; i < s->num_cpu; i++) {
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sysbus_init_irq(sbd, &s->parent_fiq[i]);
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}
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/* Try to create the device via the device control API */
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s->dev_fd = -1;
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@ -50,6 +50,7 @@ typedef struct GICState {
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/*< public >*/
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qemu_irq parent_irq[GIC_NCPU];
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qemu_irq parent_fiq[GIC_NCPU];
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bool enabled;
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bool cpu_enabled[GIC_NCPU];
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