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cuda: QOM'ify CUDA
It was not qdev'ified before. Turn it into a SysBusDevice and embed it in MacIO. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
parent
07a7484e5d
commit
45fa67fb68
99
hw/cuda.c
99
hw/cuda.c
@ -108,48 +108,6 @@
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/* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
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#define RTC_OFFSET 2082844800
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typedef struct CUDATimer {
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int index;
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uint16_t latch;
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uint16_t counter_value; /* counter value at load time */
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int64_t load_time;
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int64_t next_irq_time;
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QEMUTimer *timer;
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} CUDATimer;
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typedef struct CUDAState {
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MemoryRegion mem;
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/* cuda registers */
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uint8_t b; /* B-side data */
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uint8_t a; /* A-side data */
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uint8_t dirb; /* B-side direction (1=output) */
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uint8_t dira; /* A-side direction (1=output) */
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uint8_t sr; /* Shift register */
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uint8_t acr; /* Auxiliary control register */
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uint8_t pcr; /* Peripheral control register */
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uint8_t ifr; /* Interrupt flag register */
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uint8_t ier; /* Interrupt enable register */
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uint8_t anh; /* A-side data, no handshake */
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CUDATimer timers[2];
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uint32_t tick_offset;
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uint8_t last_b; /* last value of B register */
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uint8_t last_acr; /* last value of B register */
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int data_in_size;
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int data_in_index;
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int data_out_index;
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qemu_irq irq;
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uint8_t autopoll;
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uint8_t data_in[128];
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uint8_t data_out[16];
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QEMUTimer *adb_poll_timer;
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} CUDAState;
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static CUDAState cuda_state;
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ADBBusState adb_bus;
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static void cuda_update(CUDAState *s);
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@ -701,9 +659,9 @@ static const VMStateDescription vmstate_cuda = {
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}
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};
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static void cuda_reset(void *opaque)
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static void cuda_reset(DeviceState *dev)
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{
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CUDAState *s = opaque;
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CUDAState *s = CUDA(dev);
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s->b = 0;
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s->a = 0;
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@ -728,25 +686,54 @@ static void cuda_reset(void *opaque)
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set_counter(s, &s->timers[1], 0xffff);
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}
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void cuda_init (MemoryRegion **cuda_mem, qemu_irq irq)
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static void cuda_realizefn(DeviceState *dev, Error **errp)
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{
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CUDAState *s = CUDA(dev);
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struct tm tm;
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CUDAState *s = &cuda_state;
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s->irq = irq;
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s->timers[0].index = 0;
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s->timers[0].timer = qemu_new_timer_ns(vm_clock, cuda_timer1, s);
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s->timers[1].index = 1;
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qemu_get_timedate(&tm, 0);
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s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
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s->adb_poll_timer = qemu_new_timer_ns(vm_clock, cuda_adb_poll, s);
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memory_region_init_io(&s->mem, &cuda_ops, s, "cuda", 0x2000);
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*cuda_mem = &s->mem;
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vmstate_register(NULL, -1, &vmstate_cuda, s);
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qemu_register_reset(cuda_reset, s);
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}
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static void cuda_initfn(Object *obj)
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{
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SysBusDevice *d = SYS_BUS_DEVICE(obj);
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CUDAState *s = CUDA(obj);
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int i;
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memory_region_init_io(&s->mem, &cuda_ops, s, "cuda", 0x2000);
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sysbus_init_mmio(d, &s->mem);
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sysbus_init_irq(d, &s->irq);
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for (i = 0; i < ARRAY_SIZE(s->timers); i++) {
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s->timers[i].index = i;
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}
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}
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static void cuda_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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dc->realize = cuda_realizefn;
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dc->reset = cuda_reset;
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dc->vmsd = &vmstate_cuda;
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}
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static const TypeInfo cuda_type_info = {
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.name = TYPE_CUDA,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(CUDAState),
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.instance_init = cuda_initfn,
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.class_init = cuda_class_init,
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};
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static void cuda_register_types(void)
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{
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type_register_static(&cuda_type_info);
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}
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type_init(cuda_register_types)
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43
hw/macio.c
43
hw/macio.c
@ -38,9 +38,9 @@ typedef struct MacIOState
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/*< public >*/
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MemoryRegion bar;
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CUDAState cuda;
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void *dbdma;
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MemoryRegion *pic_mem;
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MemoryRegion *cuda_mem;
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MemoryRegion *escc_mem;
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} MacIOState;
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@ -52,7 +52,7 @@ typedef struct OldWorldMacIOState {
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MacIOState parent_obj;
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/*< public >*/
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qemu_irq irqs[2];
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qemu_irq irqs[3];
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MacIONVRAMState nvram;
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MACIOIDEState ide;
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@ -65,7 +65,7 @@ typedef struct NewWorldMacIOState {
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/*< private >*/
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MacIOState parent_obj;
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/*< public >*/
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qemu_irq irqs[4];
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qemu_irq irqs[5];
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MACIOIDEState ide[2];
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} NewWorldMacIOState;
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@ -76,17 +76,24 @@ static void macio_bar_setup(MacIOState *macio_state)
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if (macio_state->escc_mem) {
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memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
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}
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if (macio_state->cuda_mem) {
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memory_region_add_subregion(bar, 0x16000, macio_state->cuda_mem);
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}
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}
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static int macio_common_initfn(PCIDevice *d)
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{
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MacIOState *s = MACIO(d);
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SysBusDevice *sysbus_dev;
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int ret;
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d->config[0x3d] = 0x01; // interrupt on pin 1
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ret = qdev_init(DEVICE(&s->cuda));
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if (ret < 0) {
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return ret;
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}
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sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
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memory_region_add_subregion(&s->bar, 0x16000,
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sysbus_mmio_get_region(sysbus_dev, 0));
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macio_bar_setup(s);
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pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
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@ -103,6 +110,9 @@ static int macio_oldworld_initfn(PCIDevice *d)
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return ret;
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}
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sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
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sysbus_connect_irq(sysbus_dev, 0, os->irqs[0]);
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ret = qdev_init(DEVICE(&os->nvram));
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if (ret < 0) {
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return ret;
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@ -118,8 +128,8 @@ static int macio_oldworld_initfn(PCIDevice *d)
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}
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sysbus_dev = SYS_BUS_DEVICE(&os->ide);
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sysbus_connect_irq(sysbus_dev, 0, os->irqs[0]);
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sysbus_connect_irq(sysbus_dev, 1, os->irqs[1]);
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sysbus_connect_irq(sysbus_dev, 0, os->irqs[1]);
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sysbus_connect_irq(sysbus_dev, 1, os->irqs[2]);
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macio_ide_register_dma(&os->ide, s->dbdma, 0x16);
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ret = qdev_init(DEVICE(&os->ide));
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if (ret < 0) {
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@ -158,14 +168,17 @@ static int macio_newworld_initfn(PCIDevice *d)
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return ret;
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}
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sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[0]);
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if (s->pic_mem) {
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/* OpenPIC */
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memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
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}
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sysbus_dev = SYS_BUS_DEVICE(&ns->ide[0]);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[0]);
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sysbus_connect_irq(sysbus_dev, 1, ns->irqs[1]);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[1]);
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sysbus_connect_irq(sysbus_dev, 1, ns->irqs[2]);
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macio_ide_register_dma(&ns->ide[0], s->dbdma, 0x16);
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ret = qdev_init(DEVICE(&ns->ide[0]));
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if (ret < 0) {
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@ -173,8 +186,8 @@ static int macio_newworld_initfn(PCIDevice *d)
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}
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sysbus_dev = SYS_BUS_DEVICE(&ns->ide[1]);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[2]);
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sysbus_connect_irq(sysbus_dev, 1, ns->irqs[3]);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[3]);
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sysbus_connect_irq(sysbus_dev, 1, ns->irqs[4]);
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macio_ide_register_dma(&ns->ide[0], s->dbdma, 0x1a);
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ret = qdev_init(DEVICE(&ns->ide[1]));
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if (ret < 0) {
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@ -211,6 +224,10 @@ static void macio_instance_init(Object *obj)
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memory_region_init(&s->bar, "macio", 0x80000);
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object_initialize(&s->cuda, TYPE_CUDA);
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qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
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object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
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s->dbdma = DBDMA_init(&dbdma_mem);
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memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
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}
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@ -275,13 +292,11 @@ type_init(macio_register_types)
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void macio_init(PCIDevice *d,
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MemoryRegion *pic_mem,
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MemoryRegion *cuda_mem,
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MemoryRegion *escc_mem)
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{
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MacIOState *macio_state = MACIO(d);
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macio_state->pic_mem = pic_mem;
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macio_state->cuda_mem = cuda_mem;
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macio_state->escc_mem = escc_mem;
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/* Note: this code is strongly inspirated from the corresponding code
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in PearPC */
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68
hw/ppc/mac.h
68
hw/ppc/mac.h
@ -44,7 +44,72 @@
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#define ESCC_CLOCK 3686400
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/* Cuda */
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void cuda_init (MemoryRegion **cuda_mem, qemu_irq irq);
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#define TYPE_CUDA "cuda"
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#define CUDA(obj) OBJECT_CHECK(CUDAState, (obj), TYPE_CUDA)
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/**
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* CUDATimer:
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* @counter_value: counter value at load time
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*/
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typedef struct CUDATimer {
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int index;
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uint16_t latch;
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uint16_t counter_value;
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int64_t load_time;
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int64_t next_irq_time;
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QEMUTimer *timer;
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} CUDATimer;
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/**
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* CUDAState:
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* @b: B-side data
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* @a: A-side data
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* @dirb: B-side direction (1=output)
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* @dira: A-side direction (1=output)
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* @sr: Shift register
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* @acr: Auxiliary control register
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* @pcr: Peripheral control register
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* @ifr: Interrupt flag register
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* @ier: Interrupt enable register
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* @anh: A-side data, no handshake
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* @last_b: last value of B register
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* @last_acr: last value of ACR register
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*/
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typedef struct CUDAState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion mem;
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/* cuda registers */
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uint8_t b;
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uint8_t a;
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uint8_t dirb;
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uint8_t dira;
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uint8_t sr;
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uint8_t acr;
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uint8_t pcr;
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uint8_t ifr;
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uint8_t ier;
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uint8_t anh;
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CUDATimer timers[2];
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uint32_t tick_offset;
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uint8_t last_b;
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uint8_t last_acr;
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int data_in_size;
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int data_in_index;
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int data_out_index;
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qemu_irq irq;
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uint8_t autopoll;
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uint8_t data_in[128];
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uint8_t data_out[16];
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QEMUTimer *adb_poll_timer;
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} CUDAState;
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/* MacIO */
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#define TYPE_OLDWORLD_MACIO "macio-oldworld"
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@ -71,7 +136,6 @@ void macio_ide_register_dma(MACIOIDEState *ide, void *dbdma, int channel);
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void macio_init(PCIDevice *dev,
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MemoryRegion *pic_mem,
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MemoryRegion *cuda_mem,
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MemoryRegion *escc_mem);
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/* Heathrow PIC */
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@ -151,7 +151,7 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
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MACIOIDEState *macio_ide;
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MacIONVRAMState *nvr;
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int bios_size;
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MemoryRegion *pic_mem, *cuda_mem, *escc_mem;
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MemoryRegion *pic_mem, *escc_mem;
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MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
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int ppc_boot_device;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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@ -363,18 +363,14 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
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ide_drive_get(hd, MAX_IDE_BUS);
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cuda_init(&cuda_mem, pic[0x19]);
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adb_kbd_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO);
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dev = DEVICE(macio);
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qdev_connect_gpio_out(dev, 0, pic[0x0d]); /* IDE */
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qdev_connect_gpio_out(dev, 1, pic[0x02]); /* IDE DMA */
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qdev_connect_gpio_out(dev, 2, pic[0x0e]); /* IDE */
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qdev_connect_gpio_out(dev, 3, pic[0x02]); /* IDE DMA */
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macio_init(macio, pic_mem, cuda_mem, escc_bar);
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qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */
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qdev_connect_gpio_out(dev, 1, pic[0x0d]); /* IDE */
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qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE DMA */
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qdev_connect_gpio_out(dev, 3, pic[0x0e]); /* IDE */
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qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE DMA */
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macio_init(macio, pic_mem, escc_bar);
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/* We only emulate 2 out of 3 IDE controllers for now */
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macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
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@ -385,6 +381,9 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
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"ide[1]"));
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macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
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adb_kbd_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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if (usb_enabled(machine_arch == ARCH_MAC99_U3)) {
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pci_create_simple(pci_bus, -1, "pci-ohci");
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/* U3 needs to use USB for input because Linux doesn't support via-cuda
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@ -93,7 +93,7 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
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MACIOIDEState *macio_ide;
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DeviceState *dev;
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int bios_size;
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MemoryRegion *pic_mem, *cuda_mem;
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MemoryRegion *pic_mem;
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MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1);
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uint16_t ppc_boot_device;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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@ -263,17 +263,12 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
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ide_drive_get(hd, MAX_IDE_BUS);
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/* cuda also initialize ADB */
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cuda_init(&cuda_mem, pic[0x12]);
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adb_kbd_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
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dev = DEVICE(macio);
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qdev_connect_gpio_out(dev, 0, pic[0x0D]); /* IDE */
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qdev_connect_gpio_out(dev, 1, pic[0x02]); /* IDE DMA */
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macio_init(macio, pic_mem, cuda_mem, escc_bar);
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qdev_connect_gpio_out(dev, 0, pic[0x12]); /* CUDA */
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qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE */
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qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE DMA */
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macio_init(macio, pic_mem, escc_bar);
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/* First IDE channel is a MAC IDE on the MacIO bus */
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macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
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@ -286,6 +281,9 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
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hd[3] = hd[2] = NULL;
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pci_cmd646_ide_init(pci_bus, hd, 0);
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||||
|
||||
adb_kbd_init(&adb_bus);
|
||||
adb_mouse_init(&adb_bus);
|
||||
|
||||
if (usb_enabled(false)) {
|
||||
pci_create_simple(pci_bus, -1, "pci-ohci");
|
||||
}
|
||||
|
Loading…
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Reference in New Issue
Block a user