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PCI: Mask writes to RO bits in the command reg of PCI config space

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The Command register in the PCI config space has some read-only bits.
Any writes to those bits should be masked out.

Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6092 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-12-18 22:43:40 +00:00
parent 8098ed414a
commit 475dc65f6d
2 changed files with 8 additions and 0 deletions
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3
hw/pci.c
View File

@ -417,6 +417,9 @@ void pci_default_write_config(PCIDevice *d,
if (can_write) {
/* Mask out writes to reserved bits in registers */
switch (addr) {
case 0x05:
val &= ~PCI_COMMAND_RESERVED_MASK_HI;
break;
case 0x06:
val &= ~PCI_STATUS_RESERVED_MASK_LO;
break;

5
hw/pci.h
View File

@ -69,6 +69,11 @@ typedef struct PCIIORegion {
#define PCI_STATUS_RESERVED_MASK_HI (PCI_STATUS_DEVSEL >> 8)
/* Bits in the PCI Command Register (PCI 2.3 spec) */
#define PCI_COMMAND_RESERVED 0xf800
#define PCI_COMMAND_RESERVED_MASK_HI (PCI_COMMAND_RESERVED >> 8)
struct PCIDevice {
/* PCI config space */
uint8_t config[256];