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pci: untangle pci/msi dependency
msi depends on pci but pci should not depend on msi. The only dependency we have is a recent addition of pci_msi_ functions, IMO they add little enough to open-code in the small number of users. Follow-up patches add more cleanups. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
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b1aeb92666
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19
hw/pci.c
19
hw/pci.c
@ -25,8 +25,6 @@
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#include "pci.h"
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#include "pci_bridge.h"
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#include "pci_internals.h"
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#include "msix.h"
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#include "msi.h"
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#include "monitor.h"
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#include "net.h"
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#include "sysemu.h"
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@ -1099,23 +1097,6 @@ static void pci_set_irq(void *opaque, int irq_num, int level)
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pci_change_irq_level(pci_dev, irq_num, change);
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}
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bool pci_msi_enabled(PCIDevice *dev)
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{
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return msix_enabled(dev) || msi_enabled(dev);
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}
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void pci_msi_notify(PCIDevice *dev, unsigned int vector)
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{
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if (msix_enabled(dev)) {
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msix_notify(dev, vector);
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} else if (msi_enabled(dev)) {
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msi_notify(dev, vector);
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} else {
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/* MSI/MSI-X must be enabled */
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abort();
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}
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}
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/***********************************************************/
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/* monitor info on PCI */
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3
hw/pci.h
3
hw/pci.h
@ -261,9 +261,6 @@ void do_pci_info_print(Monitor *mon, const QObject *data);
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void do_pci_info(Monitor *mon, QObject **ret_data);
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void pci_bridge_update_mappings(PCIBus *b);
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bool pci_msi_enabled(PCIDevice *dev);
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void pci_msi_notify(PCIDevice *dev, unsigned int vector);
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static inline void
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pci_set_byte(uint8_t *config, uint8_t val)
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{
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@ -167,10 +167,12 @@ static void hotplug_event_notify(PCIDevice *dev)
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* The Port may optionally send an MSI when there are hot-plug events that
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* occur while interrupt generation is disabled, and interrupt generation is
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* subsequently enabled. */
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if (!pci_msi_enabled(dev)) {
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if (msix_enabled(dev)) {
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msix_notify(dev, pcie_cap_flags_get_vector(dev));
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} else if (msi_enabled(dev)) {
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msi_notify(dev, pcie_cap_flags_get_vector(dev));
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} else {
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qemu_set_irq(dev->irq[dev->exp.hpev_intx], dev->exp.hpev_notified);
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} else if (dev->exp.hpev_notified) {
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pci_msi_notify(dev, pcie_cap_flags_get_vector(dev));
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}
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}
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@ -339,9 +339,13 @@ static bool pcie_aer_msg_root_port(PCIDevice *dev, const PCIEAERMsg *msg)
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if (root_cmd & msg->severity) {
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/* 6.2.4.1.2 Interrupt Generation */
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if (pci_msi_enabled(dev)) {
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if (msix_enabled(dev)) {
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if (msi_trigger) {
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pci_msi_notify(dev, pcie_aer_root_get_vector(dev));
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msix_notify(dev, pcie_aer_root_get_vector(dev));
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}
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} else if (msi_enabled(dev)) {
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if (msi_trigger) {
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msi_notify(dev, pcie_aer_root_get_vector(dev));
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}
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} else {
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qemu_set_irq(dev->irq[dev->exp.aer_intx], 1);
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@ -761,16 +765,20 @@ void pcie_aer_root_write_config(PCIDevice *dev,
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/* 6.2.4.1.2 Interrupt Generation */
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/* 0 -> 1 */
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uint32_t root_cmd_set = (root_cmd_prev ^ root_cmd) & root_cmd;
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uint32_t root_cmd_set = ~root_cmd_prev & root_cmd;
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uint32_t root_status = pci_get_long(aer_cap + PCI_ERR_ROOT_STATUS);
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bool trigger = pcie_aer_root_does_trigger(root_cmd_set, root_status);
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if (pci_msi_enabled(dev)) {
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if (pcie_aer_root_does_trigger(root_cmd_set, root_status)) {
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pci_msi_notify(dev, pcie_aer_root_get_vector(dev));
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if (msix_enabled(dev)) {
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if (trigger) {
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msix_notify(dev, pcie_aer_root_get_vector(dev));
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}
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} else if (msi_enabled(dev)) {
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if (trigger) {
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msi_notify(dev, pcie_aer_root_get_vector(dev));
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}
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} else {
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int int_level = pcie_aer_root_does_trigger(root_cmd, root_status);
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qemu_set_irq(dev->irq[dev->exp.aer_intx], int_level);
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qemu_set_irq(dev->irq[dev->exp.aer_intx], trigger);
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}
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}
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}
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