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* Fix MMX instructions for system emulators

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* Fix uninitialized TranslateFault after canonical address checks
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* Fix MMX instructions for system emulators
* Fix uninitialized TranslateFault after canonical address checks

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# gpg: Signature made Thu 01 Dec 2022 03:53:33 EST
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
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#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  target/i386: Always completely initialize TranslateFault
  target/i386: allow MMX instructions with CR4.OSFXSR=0

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2022-12-04 11:00:44 -05:00
commit 4bd638ac65
2 changed files with 21 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
target/i386/tcg/decode-new.c.inc
View File

@ -1488,7 +1488,8 @@ static bool validate_vex(DisasContext *s, X86DecodedInsn *decode)
if (!(s->flags & HF_AVX_EN_MASK)) { if (!(s->flags & HF_AVX_EN_MASK)) {
goto illegal; goto illegal;
} }
} else { } else if (e->special != X86_SPECIAL_MMX ||
(s->prefix & (PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA))) {
if (!(s->flags & HF_OSFXSR_MASK)) { if (!(s->flags & HF_OSFXSR_MASK)) {
goto illegal; goto illegal;
} }

34
target/i386/tcg/sysemu/excp_helper.c
View File

@ -71,10 +71,11 @@ static bool ptw_translate(PTETranslate *inout, hwaddr addr)
TranslateFault *err = inout->err; TranslateFault *err = inout->err;
assert(inout->ptw_idx == MMU_NESTED_IDX); assert(inout->ptw_idx == MMU_NESTED_IDX);
err->exception_index = 0; /* unused */ *err = (TranslateFault){
err->error_code = inout->env->error_code; .error_code = inout->env->error_code,
err->cr2 = addr; .cr2 = addr,
err->stage2 = S2_GPT; .stage2 = S2_GPT,
};
return false; return false;
} }
return true; return true;
@ -431,10 +432,11 @@ do_check_protect_pse36:
MMU_NESTED_IDX, true, MMU_NESTED_IDX, true,
&pte_trans.haddr, &full, 0); &pte_trans.haddr, &full, 0);
if (unlikely(flags & TLB_INVALID_MASK)) { if (unlikely(flags & TLB_INVALID_MASK)) {
err->exception_index = 0; /* unused */ *err = (TranslateFault){
err->error_code = env->error_code; .error_code = env->error_code,
err->cr2 = paddr; .cr2 = paddr,
err->stage2 = S2_GPA; .stage2 = S2_GPA,
};
return false; return false;
} }
@ -494,10 +496,11 @@ do_check_protect_pse36:
} }
break; break;
} }
err->exception_index = EXCP0E_PAGE; *err = (TranslateFault){
err->error_code = error_code; .exception_index = EXCP0E_PAGE,
err->cr2 = addr; .error_code = error_code,
err->stage2 = S2_NONE; .cr2 = addr,
};
return false; return false;
} }
@ -564,9 +567,10 @@ static bool get_physical_address(CPUX86State *env, vaddr addr,
int shift = in.pg_mode & PG_MODE_LA57 ? 56 : 47; int shift = in.pg_mode & PG_MODE_LA57 ? 56 : 47;
int64_t sext = (int64_t)addr >> shift; int64_t sext = (int64_t)addr >> shift;
if (sext != 0 && sext != -1) { if (sext != 0 && sext != -1) {
err->exception_index = EXCP0D_GPF; *err = (TranslateFault){
err->error_code = 0; .exception_index = EXCP0D_GPF,
err->cr2 = addr; .cr2 = addr,
};
return false; return false;
} }
} }