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hw/net/eepro100.c: Don't use cpu_to_*w() and *_to_cpup()

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Don't use cpu_to_*w() and *_to_cpup() to do byte-swapped loads
and stores; instead use ld*_p() and st*_p() which correctly handle
misaligned accesses.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Acked-by: Jason Wang <jasowang@redhat.com>
Acked-by: Dmitry Fleytman <dmitry@daynix.com <mailto:dmitry@daynix.com>>
Message-id: 1466097446-981-2-git-send-email-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2016-06-16 18:17:22 +01:00
parent f12103afaa
commit 4d9be25200
1 changed files with 4 additions and 4 deletions
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8
hw/net/eepro100.c
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@ -352,14 +352,14 @@ static unsigned e100_compute_mcast_idx(const uint8_t *ep)
static uint16_t e100_read_reg2(EEPRO100State *s, E100RegisterOffset addr)
{
assert(!((uintptr_t)&s->mem[addr] & 1));
return le16_to_cpup((uint16_t *)&s->mem[addr]);
return lduw_le_p(&s->mem[addr]);
}
/* Read a 32 bit control/status (CSR) register. */
static uint32_t e100_read_reg4(EEPRO100State *s, E100RegisterOffset addr)
{
assert(!((uintptr_t)&s->mem[addr] & 3));
return le32_to_cpup((uint32_t *)&s->mem[addr]);
return ldl_le_p(&s->mem[addr]);
}
/* Write a 16 bit control/status (CSR) register. */
@ -367,7 +367,7 @@ static void e100_write_reg2(EEPRO100State *s, E100RegisterOffset addr,
uint16_t val)
{
assert(!((uintptr_t)&s->mem[addr] & 1));
cpu_to_le16w((uint16_t *)&s->mem[addr], val);
stw_le_p(&s->mem[addr], val);
}
/* Read a 32 bit control/status (CSR) register. */
@ -375,7 +375,7 @@ static void e100_write_reg4(EEPRO100State *s, E100RegisterOffset addr,
uint32_t val)
{
assert(!((uintptr_t)&s->mem[addr] & 3));
cpu_to_le32w((uint32_t *)&s->mem[addr], val);
stl_le_p(&s->mem[addr], val);
}
#if defined(DEBUG_EEPRO100)