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- Replace hw_error() with qemu_log_mask() in the m68k coldfire machine code

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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-05-30' into staging

- Replace hw_error() with qemu_log_mask() in the m68k coldfire machine code

# gpg: Signature made Sat 30 May 2020 08:44:41 BST
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "huth@tuxfamily.org"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* remotes/huth-gitlab/tags/pull-request-2020-05-30:
  hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask()
  hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-05-31 20:43:45 +01:00
commit 4ec2a1f53e
4 changed files with 32 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
hw/m68k/mcf5206.c
View File

@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/irq.h"
@ -225,7 +226,8 @@ static void m5206_mbar_update(m5206_mbar_state *s)
break;
default:
/* Unknown vector. */
error_report("Unhandled vector for IRQ %d", irq);
qemu_log_mask(LOG_UNIMP, "%s: Unhandled vector for IRQ %d\n",
__func__, irq);
vector = 0xf;
break;
}
@ -273,7 +275,7 @@ static void m5206_mbar_reset(m5206_mbar_state *s)
}
static uint64_t m5206_mbar_read(m5206_mbar_state *s,
uint64_t offset, unsigned size)
uint16_t offset, unsigned size)
{
if (offset >= 0x100 && offset < 0x120) {
return m5206_timer_read(s->timer[0], offset - 0x100);
@ -306,11 +308,12 @@ static uint64_t m5206_mbar_read(m5206_mbar_state *s,
case 0x170: return s->uivr[0];
case 0x1b0: return s->uivr[1];
}
hw_error("Bad MBAR read offset 0x%x", (int)offset);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad MBAR offset 0x%"PRIx16"\n",
__func__, offset);
return 0;
}
static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
static void m5206_mbar_write(m5206_mbar_state *s, uint16_t offset,
uint64_t value, unsigned size)
{
if (offset >= 0x100 && offset < 0x120) {
@ -360,7 +363,8 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
s->uivr[1] = value;
break;
default:
hw_error("Bad MBAR write offset 0x%x", (int)offset);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad MBAR offset 0x%"PRIx16"\n",
__func__, offset);
break;
}
}

16
hw/m68k/mcf5208.c
View File

@ -9,10 +9,10 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/m68k/mcf.h"
#include "hw/m68k/mcf_fec.h"
@ -111,8 +111,9 @@ static void m5208_timer_write(void *opaque, hwaddr offset,
case 4:
break;
default:
hw_error("m5208_timer_write: Bad offset 0x%x\n", (int)offset);
break;
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
__func__, offset);
return;
}
m5208_timer_update(s);
}
@ -136,7 +137,8 @@ static uint64_t m5208_timer_read(void *opaque, hwaddr addr,
case 4:
return ptimer_get_count(s->timer);
default:
hw_error("m5208_timer_read: Bad offset 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
__func__, addr);
return 0;
}
}
@ -164,7 +166,8 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
return 0;
default:
hw_error("m5208_sys_read: Bad offset 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
__func__, addr);
return 0;
}
}
@ -172,7 +175,8 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
static void m5208_sys_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
__func__, addr);
}
static const MemoryRegionOps m5208_sys_ops = {

10
hw/m68k/mcf_intc.c
View File

@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
#include "qemu/log.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/irq.h"
@ -80,7 +81,9 @@ static uint64_t mcf_intc_read(void *opaque, hwaddr addr,
case 0xe1: case 0xe2: case 0xe3: case 0xe4:
case 0xe5: case 0xe6: case 0xe7:
/* LnIACK */
hw_error("mcf_intc_read: LnIACK not implemented\n");
qemu_log_mask(LOG_UNIMP, "%s: LnIACK not implemented (offset 0x%02x)\n",
__func__, offset);
/* fallthru */
default:
return 0;
}
@ -127,8 +130,9 @@ static void mcf_intc_write(void *opaque, hwaddr addr,
}
break;
default:
hw_error("mcf_intc_write: Bad write offset %d\n", offset);
break;
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%02x\n",
__func__, offset);
return;
}
mcf_intc_update(s);
}

9
hw/net/mcf_fec.c
View File

@ -7,7 +7,7 @@
*/
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "qemu/log.h"
#include "hw/irq.h"
#include "net/net.h"
#include "qemu/module.h"
@ -392,7 +392,8 @@ static uint64_t mcf_fec_read(void *opaque, hwaddr addr,
case 0x188: return s->emrbr;
case 0x200 ... 0x2e0: return s->mib[(addr & 0x1ff) / 4];
default:
hw_error("mcf_fec_read: Bad address 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%" HWADDR_PRIX "\n",
__func__, addr);
return 0;
}
}
@ -492,7 +493,9 @@ static void mcf_fec_write(void *opaque, hwaddr addr,
s->mib[(addr & 0x1ff) / 4] = value;
break;
default:
hw_error("mcf_fec_write Bad address 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%" HWADDR_PRIX "\n",
__func__, addr);
return;
}
mcf_fec_update(s);
}