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target-tilegx: Handle scalar multiply instructions
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
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@ -213,6 +213,38 @@ static void gen_dblaligni(TCGv tdest, TCGv tsrca, TCGv tsrcb, int shr)
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tcg_temp_free(t0);
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}
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typedef enum {
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LU, LS, HU, HS
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} MulHalf;
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static void gen_ext_half(TCGv d, TCGv s, MulHalf h)
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{
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switch (h) {
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case LU:
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tcg_gen_ext32u_tl(d, s);
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break;
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case LS:
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tcg_gen_ext32s_tl(d, s);
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break;
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case HU:
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tcg_gen_shri_tl(d, s, 32);
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break;
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case HS:
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tcg_gen_sari_tl(d, s, 32);
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break;
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}
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}
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static void gen_mul_half(TCGv tdest, TCGv tsrca, TCGv tsrcb,
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MulHalf ha, MulHalf hb)
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{
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TCGv t = tcg_temp_new();
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gen_ext_half(t, tsrca, ha);
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gen_ext_half(tdest, tsrcb, hb);
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tcg_gen_mul_tl(tdest, tdest, t);
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tcg_temp_free(t);
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}
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static TileExcp gen_st_opcode(DisasContext *dc, unsigned dest, unsigned srca,
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unsigned srcb, TCGMemOp memop, const char *name)
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{
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@ -615,38 +647,118 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
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case OE_RRR(MNZ, 0, X1):
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case OE_RRR(MNZ, 4, Y0):
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case OE_RRR(MNZ, 4, Y1):
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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case OE_RRR(MULAX, 0, X0):
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case OE_RRR(MULAX, 3, Y0):
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tcg_gen_mul_tl(tdest, tsrca, tsrcb);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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tcg_gen_ext32s_tl(tdest, tdest);
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mnemonic = "mulax";
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break;
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case OE_RRR(MULA_HS_HS, 0, X0):
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case OE_RRR(MULA_HS_HS, 9, Y0):
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gen_mul_half(tdest, tsrca, tsrcb, HS, HS);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_hs_hs";
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break;
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case OE_RRR(MULA_HS_HU, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HS, HU);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_hs_hu";
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break;
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case OE_RRR(MULA_HS_LS, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HS, LS);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_hs_ls";
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break;
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case OE_RRR(MULA_HS_LU, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HS, LU);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_hs_lu";
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break;
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case OE_RRR(MULA_HU_HU, 0, X0):
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case OE_RRR(MULA_HU_HU, 9, Y0):
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gen_mul_half(tdest, tsrca, tsrcb, HU, HU);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_hu_hu";
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break;
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case OE_RRR(MULA_HU_LS, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HU, LS);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_hu_ls";
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break;
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case OE_RRR(MULA_HU_LU, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HU, LU);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_hu_lu";
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break;
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case OE_RRR(MULA_LS_LS, 0, X0):
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case OE_RRR(MULA_LS_LS, 9, Y0):
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gen_mul_half(tdest, tsrca, tsrcb, LS, LS);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_ls_ls";
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break;
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case OE_RRR(MULA_LS_LU, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, LS, LU);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_ls_lu";
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break;
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case OE_RRR(MULA_LU_LU, 0, X0):
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case OE_RRR(MULA_LU_LU, 9, Y0):
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gen_mul_half(tdest, tsrca, tsrcb, LU, LU);
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tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest));
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mnemonic = "mula_lu_lu";
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break;
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case OE_RRR(MULX, 0, X0):
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case OE_RRR(MULX, 3, Y0):
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tcg_gen_mul_tl(tdest, tsrca, tsrcb);
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tcg_gen_ext32s_tl(tdest, tdest);
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mnemonic = "mulx";
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break;
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case OE_RRR(MUL_HS_HS, 0, X0):
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case OE_RRR(MUL_HS_HS, 8, Y0):
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gen_mul_half(tdest, tsrca, tsrcb, HS, HS);
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mnemonic = "mul_hs_hs";
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break;
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case OE_RRR(MUL_HS_HU, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HS, HU);
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mnemonic = "mul_hs_hu";
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break;
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case OE_RRR(MUL_HS_LS, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HS, LS);
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mnemonic = "mul_hs_ls";
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break;
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case OE_RRR(MUL_HS_LU, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HS, LU);
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mnemonic = "mul_hs_lu";
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break;
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case OE_RRR(MUL_HU_HU, 0, X0):
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case OE_RRR(MUL_HU_HU, 8, Y0):
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gen_mul_half(tdest, tsrca, tsrcb, HU, HU);
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mnemonic = "mul_hu_hu";
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break;
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case OE_RRR(MUL_HU_LS, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HU, LS);
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mnemonic = "mul_hu_ls";
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break;
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case OE_RRR(MUL_HU_LU, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, HU, LU);
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mnemonic = "mul_hu_lu";
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break;
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case OE_RRR(MUL_LS_LS, 0, X0):
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case OE_RRR(MUL_LS_LS, 8, Y0):
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gen_mul_half(tdest, tsrca, tsrcb, LS, LS);
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mnemonic = "mul_ls_ls";
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break;
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case OE_RRR(MUL_LS_LU, 0, X0):
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gen_mul_half(tdest, tsrca, tsrcb, LS, LU);
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mnemonic = "mul_ls_lu";
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break;
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case OE_RRR(MUL_LU_LU, 0, X0):
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case OE_RRR(MUL_LU_LU, 8, Y0):
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gen_mul_half(tdest, tsrca, tsrcb, LU, LU);
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mnemonic = "mul_lu_lu";
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break;
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case OE_RRR(MZ, 0, X0):
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case OE_RRR(MZ, 0, X1):
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case OE_RRR(MZ, 4, Y0):
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