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ppc patch queue 2018-09-25

Browse Source 
Here are the accumulated ppc target patches for the last several
 weeks. Highlights are:
    * A number of 40p / PReP cleanups
    * Preliminary irq rework on the pseries machine towards the new
      XIVE interrupt controller
 
 There are a few patches which make small changes to generic device and
 arm code as prerequisites to the 40p interrupt routing cleanup.  They
 have acks from the relevant maintainers.
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180925' into staging

ppc patch queue 2018-09-25

Here are the accumulated ppc target patches for the last several
weeks. Highlights are:
   * A number of 40p / PReP cleanups
   * Preliminary irq rework on the pseries machine towards the new
     XIVE interrupt controller

There are a few patches which make small changes to generic device and
arm code as prerequisites to the 40p interrupt routing cleanup.  They
have acks from the relevant maintainers.

# gpg: Signature made Tue 25 Sep 2018 08:00:06 BST
# gpg:                using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-3.1-20180925:
  40p: add fixed IRQ routing for LSI SCSI device
  lsi53c895a: add optional external IRQ via qdev
  scsi: remove unused lsi53c895a_create() and lsi53c810_create() functions
  scsi: move lsi53c8xx_create() callers to lsi53c8xx_handle_legacy_cmdline()
  scsi: add lsi53c8xx_handle_legacy_cmdline() function
  sm501: Adjust endianness of pixel value in rectangle fill
  spapr_pci: add an extra 'nr_msis' argument to spapr_populate_pci_dt
  spapr: increase the size of the IRQ number space
  spapr: introduce a spapr_irq class 'nr_msis' attribute
  40p: use OR gate to wire up raven PCI interrupts
  raven: some minor IRQ-related tidy-ups
  hw/ppc: on 40p machine, change default firmware to OpenBIOS
  target/ppc/cpu-models: Re-group the 970 CPUs together again
  Record history of ppcemb target in common.json

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2018-09-25 13:30:45 +01:00
commit 506e4a00de
17 changed files with 117 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
hw/arm/realview.c
View File

@ -257,7 +257,8 @@ static void realview_init(MachineState *machine,
}
n = drive_get_max_bus(IF_SCSI);
while (n >= 0) {
lsi53c895a_create(pci_bus);
dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
lsi53c8xx_handle_legacy_cmdline(dev);
n--;
}
}

3
hw/arm/versatilepb.c
View File

@ -278,7 +278,8 @@ static void versatile_init(MachineState *machine, int board_id)
}
n = drive_get_max_bus(IF_SCSI);
while (n >= 0) {
lsi53c895a_create(pci_bus);
dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
lsi53c8xx_handle_legacy_cmdline(dev);
n--;
}

3
hw/display/sm501.c
View File

@ -39,6 +39,7 @@
#include "hw/i2c/i2c-ddc.h"
#include "qemu/range.h"
#include "ui/pixel_ops.h"
#include "qemu/bswap.h"
/*
* Status: 2010/05/07
@ -812,9 +813,11 @@ static void sm501_2d_operation(SM501State *s)
FILL_RECT(1, uint8_t);
break;
case 1:
color = cpu_to_le16(color);
FILL_RECT(2, uint16_t);
break;
case 2:
color = cpu_to_le32(color);
FILL_RECT(4, uint32_t);
break;
}

4
hw/hppa/machine.c
View File

@ -59,6 +59,7 @@ static void machine_hppa_init(MachineState *machine)
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
DeviceState *dev;
PCIBus *pci_bus;
ISABus *isa_bus;
qemu_irq rtc_irq, serial_irq;
@ -115,7 +116,8 @@ static void machine_hppa_init(MachineState *machine)
}
/* SCSI disk setup. */
lsi53c895a_create(pci_bus);
dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
lsi53c8xx_handle_legacy_cmdline(dev);
/* Network setup. e1000 is good enough, failing Tulip support. */
for (i = 0; i < nb_nics; i++) {

34
hw/pci-host/prep.c
View File

@ -32,6 +32,7 @@
#include "hw/pci/pci_host.h"
#include "hw/i386/pc.h"
#include "hw/loader.h"
#include "hw/or-irq.h"
#include "exec/address-spaces.h"
#include "elf.h"
@ -55,7 +56,8 @@ typedef struct RavenPCIState {
typedef struct PRePPCIState {
PCIHostState parent_obj;
qemu_irq irq[PCI_NUM_PINS];
qemu_or_irq *or_irq;
qemu_irq pci_irqs[PCI_NUM_PINS];
PCIBus pci_bus;
AddressSpace pci_io_as;
MemoryRegion pci_io;
@ -69,6 +71,7 @@ typedef struct PRePPCIState {
RavenPCIState pci_dev;
int contiguous_map;
bool is_legacy_prep;
} PREPPCIState;
#define BIOS_SIZE (1 * MiB)
@ -194,9 +197,9 @@ static int raven_map_irq(PCIDevice *pci_dev, int irq_num)
static void raven_set_irq(void *opaque, int irq_num, int level)
{
qemu_irq *pic = opaque;
PREPPCIState *s = opaque;
qemu_set_irq(pic[irq_num] , level);
qemu_set_irq(s->pci_irqs[irq_num], level);
}
static AddressSpace *raven_pcihost_set_iommu(PCIBus *bus, void *opaque,
@ -222,14 +225,28 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
MemoryRegion *address_space_mem = get_system_memory();
int i;
for (i = 0; i < PCI_NUM_PINS; i++) {
sysbus_init_irq(dev, &s->irq[i]);
if (s->is_legacy_prep) {
for (i = 0; i < PCI_NUM_PINS; i++) {
sysbus_init_irq(dev, &s->pci_irqs[i]);
}
} else {
/* According to PReP specification section 6.1.6 "System Interrupt
* Assignments", all PCI interrupts are routed via IRQ 15 */
s->or_irq = OR_IRQ(object_new(TYPE_OR_IRQ));
object_property_set_int(OBJECT(s->or_irq), PCI_NUM_PINS, "num-lines",
&error_fatal);
object_property_set_bool(OBJECT(s->or_irq), true, "realized",
&error_fatal);
sysbus_init_irq(dev, &s->or_irq->out_irq);
for (i = 0; i < PCI_NUM_PINS; i++) {
s->pci_irqs[i] = qdev_get_gpio_in(DEVICE(s->or_irq), i);
}
}
qdev_init_gpio_in(d, raven_change_gpio, 1);
pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s->irq,
PCI_NUM_PINS);
pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s, PCI_NUM_PINS);
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, s,
"pci-conf-idx", 4);
@ -383,6 +400,9 @@ static Property raven_pcihost_properties[] = {
DEFINE_PROP_UINT32("elf-machine", PREPPCIState, pci_dev.elf_machine,
EM_NONE),
DEFINE_PROP_STRING("bios-name", PREPPCIState, pci_dev.bios_name),
/* Temporary workaround until legacy prep machine is removed */
DEFINE_PROP_BOOL("is-legacy-prep", PREPPCIState, is_legacy_prep,
false),
DEFINE_PROP_END_OF_LIST()
};

21
hw/ppc/prep.c
View File

@ -502,6 +502,7 @@ static void ppc_prep_init(MachineState *machine)
}
qdev_prop_set_string(dev, "bios-name", bios_name);
qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE);
qdev_prop_set_bit(dev, "is-legacy-prep", true);
pcihost = PCI_HOST_BRIDGE(dev);
object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev), NULL);
qdev_init_nofail(dev);
@ -620,7 +621,7 @@ static void ibm_40p_init(MachineState *machine)
CPUPPCState *env = NULL;
uint16_t cmos_checksum;
PowerPCCPU *cpu;
DeviceState *dev;
DeviceState *dev, *i82378_dev;
SysBusDevice *pcihost, *s;
Nvram *m48t59 = NULL;
PCIBus *pci_bus;
@ -651,7 +652,7 @@ static void ibm_40p_init(MachineState *machine)
/* PCI host */
dev = qdev_create(NULL, "raven-pcihost");
if (!bios_name) {
bios_name = BIOS_FILENAME;
bios_name = "openbios-ppc";
}
qdev_prop_set_string(dev, "bios-name", bios_name);
qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE);
@ -665,14 +666,11 @@ static void ibm_40p_init(MachineState *machine)
}
/* PCI -> ISA bridge */
dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
qdev_connect_gpio_out(dev, 0,
i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
qdev_connect_gpio_out(i82378_dev, 0,
cpu->env.irq_inputs[PPC6xx_INPUT_INT]);
sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15));
sysbus_connect_irq(pcihost, 1, qdev_get_gpio_in(dev, 13));
sysbus_connect_irq(pcihost, 2, qdev_get_gpio_in(dev, 15));
sysbus_connect_irq(pcihost, 3, qdev_get_gpio_in(dev, 13));
isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
/* Memory controller */
dev = DEVICE(isa_create(isa_bus, "rs6000-mc"));
@ -702,7 +700,10 @@ static void ibm_40p_init(MachineState *machine)
qdev_prop_set_uint32(dev, "equipment", 0xc0);
qdev_init_nofail(dev);
lsi53c810_create(pci_bus, PCI_DEVFN(1, 0));
dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0),
"lsi53c810"));
lsi53c8xx_handle_legacy_cmdline(dev);
qdev_connect_gpio_out(dev, 0, qdev_get_gpio_in(i82378_dev, 13));
/* XXX: s3-trio at PCI_DEVFN(2, 0) */
pci_vga_init(pci_bus);

3
hw/ppc/spapr.c
View File

@ -1267,7 +1267,7 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr,
}
QLIST_FOREACH(phb, &spapr->phbs, list) {
ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt, smc->irq->nr_msis);
if (ret < 0) {
error_report("couldn't setup PCI devices in fdt");
exit(1);
@ -3971,6 +3971,7 @@ static void spapr_machine_3_0_class_options(MachineClass *mc)
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_3_0);
smc->legacy_irq_allocation = true;
smc->irq = &spapr_irq_xics_legacy;
}
DEFINE_SPAPR_MACHINE(3_0, "3.0", false);

22
hw/ppc/spapr_irq.c
View File

@ -99,7 +99,7 @@ static void spapr_irq_init_xics(sPAPRMachineState *spapr, Error **errp)
/* Initialize the MSI IRQ allocator. */
if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
spapr_irq_msi_init(spapr, XICS_IRQ_BASE + nr_irqs - SPAPR_IRQ_MSI);
spapr_irq_msi_init(spapr, smc->irq->nr_msis);
}
if (kvm_enabled()) {
@ -195,8 +195,13 @@ static void spapr_irq_print_info_xics(sPAPRMachineState *spapr, Monitor *mon)
ics_pic_print_info(spapr->ics, mon);
}
#define SPAPR_IRQ_XICS_NR_IRQS 0x1000
#define SPAPR_IRQ_XICS_NR_MSIS \
(XICS_IRQ_BASE + SPAPR_IRQ_XICS_NR_IRQS - SPAPR_IRQ_MSI)
sPAPRIrq spapr_irq_xics = {
.nr_irqs = XICS_IRQS_SPAPR,
.nr_irqs = SPAPR_IRQ_XICS_NR_IRQS,
.nr_msis = SPAPR_IRQ_XICS_NR_MSIS,
.init = spapr_irq_init_xics,
.claim = spapr_irq_claim_xics,
@ -284,3 +289,16 @@ int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **errp)
return first + ics->offset;
}
#define SPAPR_IRQ_XICS_LEGACY_NR_IRQS 0x400
sPAPRIrq spapr_irq_xics_legacy = {
.nr_irqs = SPAPR_IRQ_XICS_LEGACY_NR_IRQS,
.nr_msis = SPAPR_IRQ_XICS_LEGACY_NR_IRQS,
.init = spapr_irq_init_xics,
.claim = spapr_irq_claim_xics,
.free = spapr_irq_free_xics,
.qirq = spapr_qirq_xics,
.print_info = spapr_irq_print_info_xics,
};

8
hw/ppc/spapr_pci.c
View File

@ -2069,9 +2069,8 @@ static void spapr_phb_pci_enumerate(sPAPRPHBState *phb)
}
int spapr_populate_pci_dt(sPAPRPHBState *phb,
uint32_t xics_phandle,
void *fdt)
int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t xics_phandle, void *fdt,
uint32_t nr_msis)
{
int bus_off, i, j, ret;
gchar *nodename;
@ -2138,8 +2137,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
_FDT(fdt_setprop(fdt, bus_off, "ranges", &ranges, sizeof_ranges));
_FDT(fdt_setprop(fdt, bus_off, "reg", &bus_reg, sizeof(bus_reg)));
_FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pci-config-space-type", 0x1));
/* TODO: fine tune the total count of allocatable MSIs per PHB */
_FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi", XICS_IRQS_SPAPR));
_FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi", nr_msis));
/* Dynamic DMA window */
if (phb->ddw_enabled) {

27
hw/scsi/lsi53c895a.c
View File

@ -207,6 +207,7 @@ typedef struct {
PCIDevice parent_obj;
/*< public >*/
qemu_irq ext_irq;
MemoryRegion mmio_io;
MemoryRegion ram_io;
MemoryRegion io_io;
@ -443,9 +444,19 @@ static void lsi_stop_script(LSIState *s)
s->istat1 &= ~LSI_ISTAT1_SRUN;
}
static void lsi_update_irq(LSIState *s)
static void lsi_set_irq(LSIState *s, int level)
{
PCIDevice *d = PCI_DEVICE(s);
if (s->ext_irq) {
qemu_set_irq(s->ext_irq, level);
} else {
pci_set_irq(d, level);
}
}
static void lsi_update_irq(LSIState *s)
{
int level;
static int last_level;
lsi_request *p;
@ -477,7 +488,7 @@ static void lsi_update_irq(LSIState *s)
level, s->dstat, s->sist1, s->sist0);
last_level = level;
}
pci_set_irq(d, level);
lsi_set_irq(s, level);
if (!level && lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON)) {
DPRINTF("Handled IRQs & disconnected, looking for pending "
@ -2213,6 +2224,7 @@ static void lsi_scsi_realize(PCIDevice *dev, Error **errp)
"lsi-io", 256);
address_space_init(&s->pci_io_as, pci_address_space_io(dev), "lsi-pci-io");
qdev_init_gpio_out(d, &s->ext_irq, 1);
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio_io);
@ -2277,16 +2289,9 @@ static void lsi53c895a_register_types(void)
type_init(lsi53c895a_register_types)
void lsi53c895a_create(PCIBus *bus)
void lsi53c8xx_handle_legacy_cmdline(DeviceState *lsi_dev)
{
LSIState *s = LSI53C895A(pci_create_simple(bus, -1, "lsi53c895a"));
scsi_bus_legacy_handle_cmdline(&s->bus);
}
void lsi53c810_create(PCIBus *bus, int devfn)
{
LSIState *s = LSI53C895A(pci_create_simple(bus, devfn, "lsi53c810"));
LSIState *s = LSI53C895A(lsi_dev);
scsi_bus_legacy_handle_cmdline(&s->bus);
}

5
include/hw/pci-host/spapr.h
View File

@ -113,9 +113,8 @@ static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin)
PCIHostState *spapr_create_phb(sPAPRMachineState *spapr, int index);
int spapr_populate_pci_dt(sPAPRPHBState *phb,
uint32_t xics_phandle,
void *fdt);
int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t xics_phandle, void *fdt,
uint32_t nr_msis);
void spapr_pci_rtas_init(void);

3
include/hw/pci/pci.h
View File

@ -707,8 +707,7 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name);
PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name);
void lsi53c895a_create(PCIBus *bus);
void lsi53c810_create(PCIBus *bus, int devfn);
void lsi53c8xx_handle_legacy_cmdline(DeviceState *lsi_dev);
qemu_irq pci_allocate_irq(PCIDevice *pci_dev);
void pci_set_irq(PCIDevice *pci_dev, int level);

2
include/hw/ppc/spapr_irq.h
View File

@ -31,6 +31,7 @@ void spapr_irq_msi_reset(sPAPRMachineState *spapr);
typedef struct sPAPRIrq {
uint32_t nr_irqs;
uint32_t nr_msis;
void (*init)(sPAPRMachineState *spapr, Error **errp);
int (*claim)(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
@ -40,6 +41,7 @@ typedef struct sPAPRIrq {
} sPAPRIrq;
extern sPAPRIrq spapr_irq_xics;
extern sPAPRIrq spapr_irq_xics_legacy;
int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num);

2
include/hw/ppc/xics.h
View File

@ -181,8 +181,6 @@ typedef struct XICSFabricClass {
ICPState *(*icp_get)(XICSFabric *xi, int server);
} XICSFabricClass;
#define XICS_IRQS_SPAPR 1024
void spapr_dt_xics(int nr_servers, void *fdt, uint32_t phandle);
ICPState *xics_icp_get(XICSFabric *xi, int server);

2
qapi/common.json
View File

@ -140,6 +140,8 @@
# prefix to produce the corresponding QEMU executable name. This
# is true even for "qemu-system-x86_64".
#
# ppcemb: dropped in 3.1
#
# Since: 3.0
##
{ 'enum' : 'SysEmuTarget',

40
target/ppc/cpu-models.c
View File

@ -741,26 +741,8 @@
"PowerPC 7457A v1.2 (G4)")
/* 64 bits PowerPC */
#if defined (TARGET_PPC64)
POWERPC_DEF("power5+_v2.1", CPU_POWERPC_POWER5P_v21, POWER5P,
"POWER5+ v2.1")
POWERPC_DEF("power7_v2.3", CPU_POWERPC_POWER7_v23, POWER7,
"POWER7 v2.3")
POWERPC_DEF("power7+_v2.1", CPU_POWERPC_POWER7P_v21, POWER7,
"POWER7+ v2.1")
POWERPC_DEF("power8e_v2.1", CPU_POWERPC_POWER8E_v21, POWER8,
"POWER8E v2.1")
POWERPC_DEF("power8_v2.0", CPU_POWERPC_POWER8_v20, POWER8,
"POWER8 v2.0")
POWERPC_DEF("power8nvl_v1.0", CPU_POWERPC_POWER8NVL_v10, POWER8,
"POWER8NVL v1.0")
POWERPC_DEF("970_v2.2", CPU_POWERPC_970_v22, 970,
"PowerPC 970 v2.2")
POWERPC_DEF("power9_v1.0", CPU_POWERPC_POWER9_DD1, POWER9,
"POWER9 v1.0")
POWERPC_DEF("power9_v2.0", CPU_POWERPC_POWER9_DD20, POWER9,
"POWER9 v2.0")
POWERPC_DEF("970fx_v1.0", CPU_POWERPC_970FX_v10, 970,
"PowerPC 970FX v1.0 (G5)")
POWERPC_DEF("970fx_v2.0", CPU_POWERPC_970FX_v20, 970,
@ -775,6 +757,22 @@
"PowerPC 970MP v1.0")
POWERPC_DEF("970mp_v1.1", CPU_POWERPC_970MP_v11, 970,
"PowerPC 970MP v1.1")
POWERPC_DEF("power5+_v2.1", CPU_POWERPC_POWER5P_v21, POWER5P,
"POWER5+ v2.1")
POWERPC_DEF("power7_v2.3", CPU_POWERPC_POWER7_v23, POWER7,
"POWER7 v2.3")
POWERPC_DEF("power7+_v2.1", CPU_POWERPC_POWER7P_v21, POWER7,
"POWER7+ v2.1")
POWERPC_DEF("power8e_v2.1", CPU_POWERPC_POWER8E_v21, POWER8,
"POWER8E v2.1")
POWERPC_DEF("power8_v2.0", CPU_POWERPC_POWER8_v20, POWER8,
"POWER8 v2.0")
POWERPC_DEF("power8nvl_v1.0", CPU_POWERPC_POWER8NVL_v10, POWER8,
"POWER8NVL v1.0")
POWERPC_DEF("power9_v1.0", CPU_POWERPC_POWER9_DD1, POWER9,
"POWER9 v1.0")
POWERPC_DEF("power9_v2.0", CPU_POWERPC_POWER9_DD20, POWER9,
"POWER9 v2.0")
#endif /* defined (TARGET_PPC64) */
/***************************************************************************/
@ -940,6 +938,9 @@ PowerPCCPUAlias ppc_cpu_aliases[] = {
{ "7457a", "7457a_v1.2" },
{ "apollo7pm", "7457a_v1.0" },
#if defined(TARGET_PPC64)
{ "970", "970_v2.2" },
{ "970fx", "970fx_v3.1" },
{ "970mp", "970mp_v1.1" },
{ "power5+", "power5+_v2.1" },
{ "power5gs", "power5+_v2.1" },
{ "power7", "power7_v2.3" },
@ -948,9 +949,6 @@ PowerPCCPUAlias ppc_cpu_aliases[] = {
{ "power8", "power8_v2.0" },
{ "power8nvl", "power8nvl_v1.0" },
{ "power9", "power9_v2.0" },
{ "970", "970_v2.2" },
{ "970fx", "970fx_v3.1" },
{ "970mp", "970mp_v1.1" },
#endif
/* Generic PowerPCs */

4
tests/boot-serial-test.c
View File

@ -75,12 +75,12 @@ typedef struct testdef {
static testdef_t tests[] = {
{ "alpha", "clipper", "", "PCI:" },
{ "ppc", "ppce500", "", "U-Boot" },
{ "ppc", "40p", "-boot d", "Booting from device d" },
{ "ppc", "40p", "-vga none -boot d", "Trying cd:," },
{ "ppc", "g3beige", "", "PowerPC,750" },
{ "ppc", "mac99", "", "PowerPC,G4" },
{ "ppc", "sam460ex", "-m 256", "DRAM: 256 MiB" },
{ "ppc64", "ppce500", "", "U-Boot" },
{ "ppc64", "40p", "-m 192", "Memory size: 192 MB" },
{ "ppc64", "40p", "-m 192", "Memory: 192M" },
{ "ppc64", "mac99", "", "PowerPC,970FX" },
{ "ppc64", "pseries", "", "Open Firmware" },
{ "ppc64", "powernv", "-cpu POWER8", "OPAL" },