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target-i386: Move APIC to ICC bus
It allows APIC to be hotplugged. * map APIC's mmio at board level if it is present * do not register mmio region for each APIC, since only one is used/mapped Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Igor Mammedov
Andreas Färber
parent
62fc403f11
commit
53a89e262b
@ -80,6 +80,7 @@ typedef struct ICCBridgeState {
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/*< public >*/
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ICCBus icc_bus;
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MemoryRegion apic_container;
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} ICCBridgeState;
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#define ICC_BRIGDE(obj) OBJECT_CHECK(ICCBridgeState, (obj), TYPE_ICC_BRIDGE)
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@ -87,8 +88,17 @@ typedef struct ICCBridgeState {
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static void icc_bridge_init(Object *obj)
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{
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ICCBridgeState *s = ICC_BRIGDE(obj);
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SysBusDevice *sb = SYS_BUS_DEVICE(obj);
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qbus_create_inplace(&s->icc_bus, TYPE_ICC_BUS, DEVICE(s), "icc");
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/* Do not change order of registering regions,
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* APIC must be first registered region, board maps it by 0 index
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*/
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memory_region_init(&s->apic_container, "icc-apic-container",
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APIC_SPACE_SIZE);
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sysbus_init_mmio(sb, &s->apic_container);
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s->icc_bus.apic_address_space = &s->apic_container;
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}
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static const TypeInfo icc_bridge_info = {
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13
hw/i386/pc.c
13
hw/i386/pc.c
@ -53,6 +53,7 @@
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#include "qemu/bitmap.h"
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#include "qemu/config-file.h"
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#include "hw/acpi/acpi.h"
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#include "hw/cpu/icc_bus.h"
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/* debug PC/ISA interrupts */
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//#define DEBUG_IRQ
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@ -921,6 +922,7 @@ static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
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void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
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{
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int i;
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X86CPU *cpu = NULL;
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Error *error = NULL;
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/* init CPUs */
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@ -933,14 +935,21 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
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}
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for (i = 0; i < smp_cpus; i++) {
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pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
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icc_bridge, &error);
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cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
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icc_bridge, &error);
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if (error) {
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fprintf(stderr, "%s\n", error_get_pretty(error));
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error_free(error);
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exit(1);
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}
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}
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/* map APIC MMIO area if CPU has APIC */
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if (cpu && cpu->env.apic_state) {
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/* XXX: what if the base changes? */
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sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
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APIC_DEFAULT_ADDRESS, 0x1000);
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}
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}
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void pc_acpi_init(const char *default_dsdt)
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@ -21,6 +21,8 @@
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#include "hw/i386/apic_internal.h"
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#include "trace.h"
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#include "sysemu/kvm.h"
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#include "hw/qdev.h"
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#include "hw/sysbus.h"
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static int apic_irq_delivered;
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bool apic_report_tpr_access;
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@ -282,12 +284,13 @@ static int apic_load_old(QEMUFile *f, void *opaque, int version_id)
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return 0;
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}
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static int apic_init_common(SysBusDevice *dev)
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static int apic_init_common(ICCDevice *dev)
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{
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APICCommonState *s = APIC_COMMON(dev);
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APICCommonClass *info;
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static DeviceState *vapic;
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static int apic_no;
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static bool mmio_registered;
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if (apic_no >= MAX_APICS) {
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return -1;
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@ -296,8 +299,11 @@ static int apic_init_common(SysBusDevice *dev)
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info = APIC_COMMON_GET_CLASS(s);
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info->init(s);
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sysbus_init_mmio(dev, &s->io_memory);
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if (!mmio_registered) {
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ICCBus *b = ICC_BUS(qdev_get_parent_bus(DEVICE(dev)));
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memory_region_add_subregion(b->apic_address_space, 0, &s->io_memory);
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mmio_registered = true;
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}
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/* Note: We need at least 1M to map the VAPIC option ROM */
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if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK &&
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@ -375,19 +381,19 @@ static Property apic_properties_common[] = {
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static void apic_common_class_init(ObjectClass *klass, void *data)
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{
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SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass);
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ICCDeviceClass *idc = ICC_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->vmsd = &vmstate_apic_common;
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dc->reset = apic_reset_common;
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dc->no_user = 1;
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dc->props = apic_properties_common;
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sc->init = apic_init_common;
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idc->init = apic_init_common;
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}
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static const TypeInfo apic_common_type = {
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.name = TYPE_APIC_COMMON,
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_ICC_DEVICE,
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.instance_size = sizeof(APICCommonState),
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.class_size = sizeof(APICCommonClass),
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.class_init = apic_common_class_init,
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@ -22,6 +22,7 @@
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#ifndef ICC_BUS_H
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#define ICC_BUS_H
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#include "exec/memory.h"
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#include "hw/qdev-core.h"
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#define TYPE_ICC_BUS "icc-bus"
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@ -37,6 +38,8 @@ typedef struct ICCBus {
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/*< private >*/
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BusState parent_obj;
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/*< public >*/
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MemoryRegion *apic_address_space;
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} ICCBus;
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#define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS)
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@ -21,7 +21,7 @@
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#define QEMU_APIC_INTERNAL_H
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#include "exec/memory.h"
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#include "hw/sysbus.h"
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#include "hw/cpu/icc_bus.h"
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#include "qemu/timer.h"
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/* APIC Local Vector Table */
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@ -78,7 +78,7 @@ typedef struct APICCommonState APICCommonState;
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typedef struct APICCommonClass
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{
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SysBusDeviceClass parent_class;
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ICCDeviceClass parent_class;
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void (*init)(APICCommonState *s);
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void (*set_base)(APICCommonState *s, uint64_t val);
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@ -92,7 +92,7 @@ typedef struct APICCommonClass
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} APICCommonClass;
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struct APICCommonState {
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SysBusDevice busdev;
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ICCDevice busdev;
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MemoryRegion io_memory;
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X86CPU *cpu;
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@ -41,10 +41,10 @@
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#endif
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#include "sysemu/sysemu.h"
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#include "hw/qdev-properties.h"
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#include "hw/cpu/icc_bus.h"
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#ifndef CONFIG_USER_ONLY
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#include "hw/xen/xen.h"
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#include "hw/sysbus.h"
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#include "hw/i386/apic_internal.h"
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#endif
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@ -2131,6 +2131,7 @@ static void mce_init(X86CPU *cpu)
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static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
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{
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CPUX86State *env = &cpu->env;
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DeviceState *dev = DEVICE(cpu);
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APICCommonState *apic;
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const char *apic_type = "apic";
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@ -2140,7 +2141,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
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apic_type = "xen-apic";
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}
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env->apic_state = qdev_try_create(NULL, apic_type);
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env->apic_state = qdev_try_create(qdev_get_parent_bus(dev), apic_type);
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if (env->apic_state == NULL) {
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error_setg(errp, "APIC device '%s' could not be created", apic_type);
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return;
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@ -2157,7 +2158,6 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
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static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
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{
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CPUX86State *env = &cpu->env;
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static int apic_mapped;
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if (env->apic_state == NULL) {
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return;
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@ -2168,16 +2168,6 @@ static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
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object_get_typename(OBJECT(env->apic_state)));
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return;
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}
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/* XXX: mapping more APICs at the same memory location */
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if (apic_mapped == 0) {
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/* NOTE: the APIC is directly connected to the CPU - it is not
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on the global memory bus. */
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/* XXX: what if the base changes? */
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sysbus_mmio_map_overlap(SYS_BUS_DEVICE(env->apic_state), 0,
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APIC_DEFAULT_ADDRESS, 0x1000);
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apic_mapped = 1;
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}
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}
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#else
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static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
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